本論文實現一個基於FPGA高精度頻率調控電路，透過本論文所提出的分插式高精度動態頻率調變系統，能讓超音波諧振系統能更快且穩定的達到工作狀態，用來完成特定之工業應用。在諧振狀態之下，能夠將能量有效轉換為動能，節省能量散失。本論文並且實現一實體FPGA電路板，使得分插式高精度動態頻率調變系統能在10KHz~100KHz之廣幅度頻率下得以諧振。本論文比較三種頻率調變系統之實際諧振狀況，整數型頻率調變架構、高精度動態頻率調變系統、分插式高精度動態頻率調變系統，其中以分插式高精度動態頻率調變系統在效率及穩定時間有最好表現。綜合上述，本論文所提出的分插式高精度動態頻率調變系統確實可增進超音波諧振系統的實際運作，並減少因為能量轉換效率不良問題所帶來的熱能及系統損壞。

This paper implements a high-precision frequency control circuit based on FPGA. Through the high-precision frequency modulation system proposed in this paper, the ultrasonic resonance system can be operated more quickly and stably for specific industrial applications, and also under the resonant state, energy can be efficiently converted into kinetic energy, saving energy loss. This paper also implements a physical FPGA circuit board, so that the high-precision frequency modulation system can resonate at a wide amplitude frequency of 10KHz~100KHz. This paper compares the actual resonance conditions of three frequency modulation systems, integer frequency modulation architecture, high-precision frequency modulation system, interpolation of high-precision frequency modulation system, in which the interpolation of high-precision frequency modulation system has the best performance in efficiency and stability time. In summary, the interpolation of high-precision frequency modulation system proposed in this paper can improve the operation of the ultrasonic resonance system and reduce the thermal energy and system damage caused by the poor energy conversion efficiency.

目錄
致謝	I
中文摘要	II
英文摘要	III
目錄	IV
圖目錄	VI
表目錄	VI
第一章	緒論	1
1.1	研究目的	1
1.2	研究背景	3
1.3	論文架構	5
第二章	控制原理及架構	6
2.1	整數型頻率調變架構	6
2.2	高精度動態頻率調變系統	9
2.3	分插式高精度動態頻率調變系統	12
第三章	FPGA系統架構建置設計方法	14
3.1	系統架構圖	14
3.2	50MHz時脈電路	16
3.3	使用I2C(Inter-Integrated Circuit )串列之EEPROM	17
3.4	電源系統分配	18
3.5	FPGA板控制面板的整體結構	20
第四章	實驗結果	21
4.1	諧振系統整體概觀	21
4.2	FPGA控制電路規劃佈局(Layout)	22
4.3	實驗結果與分析	24
第五章	結論	26
參考文獻		27

圖目錄
圖2.1整數型調變在35KHz下之誤差頻率	8
圖2.2以n = 2^5在35KHz下之誤差頻率	10
圖2.3 高精度動態頻率調變器	10
圖2.4在n = 2^5階層中分插式高精度動態頻率調變範例	11
圖2.5 在(n.m)=(32.5)階層中分插式高精度動態頻率調變範例	13
圖2.6分插式高精度動態頻率調變器	13
圖3.1 FPGA輸出PWM方波圖	14
圖3.2 FPGA計算PWM之電路圖	15
圖3.3 Cyclone IV內置Nios之控制架構圖	16
圖3.4 FPGA板之時脈引腳圖	16
圖3.5 FPGA與EEPROM線路圖	17
圖3.6 電源系統配置圖	19
圖3.7 FPGA板控制面板的整體結構圖	20
圖4.1整體系統架構圖	21
圖4.2 FPGA Layout線路圖	22
圖4.3(a)(b) FPGA控制電路板	23

表目錄
表4.1調變類型之輸出結果比較	24

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