薄膜結構在微機電技術所製作的微小元件中，係相當重要之關鍵結構，因此本研究將討論微觀尺度下薄膜的力學特性，包括了結構變形的力學分析以及薄膜受力時熱變形狀態，希望了解薄膜之特性表現，並以薄膜結構作為關鍵零件發展感測器與驅動器，並整理出各種元件之理論輸出公式，方便於設計元件之初，即可先行了解元件性能，加快元件設計與製造之速度。
感測器的部分將以微型壓力感測器作為探討的主要對象，本文提出三項壓力計的創新製程，首先改良傳統的全平面薄膜，設計加強島塊於中央位置，增加薄膜強度，製作新型高壓力負載壓力感測器，且利用ANSYS模擬受力時之電壓理論輸出。並且提出以低溫製程之聚二甲基矽氧烷(polydimethylsiloxane, PDMS)微模造技術整合微壓力感測陣列，製作微流道壓力現地量測系統之概念。
第二項創新是以高分子材料PDMS，取代一般工業應用中壓力計下方的玻璃晶片，作為封裝材料；借重PDMS的低溫製程特性與價格低廉優勢，大幅降低壓力計之封裝成本。並比較傳統Pyrex #7740玻璃之陽極接合封裝製程與新型PDMS封裝製程所製作之壓力計輸出性能，比較後發現二者之性能表現於伯仲之間，文中並探討PDMS之洩漏機制。
第三項創新則是利用目前相當成熟之互補式金屬氧化物半導體(CMOS)製程代工的方式，搭配正面蝕刻的加工技法，製作五十微米見方之壓力感測器，其中，壓力薄膜材料為氧化矽，壓電阻則是由多晶矽所組成，並利用金屬犧牲層掏空的方式懸浮壓力薄膜。由於受限於CMOS代工製程中的限制以及遵守代工廠之設計法則，薄膜結構將與以往所呈現之形狀大相逕庭，傳統理論分析的難度將大大提昇，因此將以有限元素模擬分析軟體ANSYS，分析此種特殊薄膜之受力特性，尋找壓電阻最佳位置並先行預測其輸出特性。
驅動器部分則是利用微米尺度薄膜熱傳速度快的特性，配合特殊之結構設計，製作熱挫曲式膜片振動幫浦，以ANSYS模擬受熱時薄膜之熱固耦合作動現象，預測其效能。實際製作之驅動元件可在僅提供3伏特的驅動電壓下，以不超過攝氏40度的工作溫度進行驅動，利用雷射干涉儀量測作動時之狀況發現其最大變型量為0.35微米，截止頻率為1000赫茲。
除了矽基壓力感測器外，本文亦提出利用壓電薄膜聚偏二氟乙烯(PVDF)製作一可撓式力感測器之概念，設計一特殊電極用以測量穩態之壓力負荷，由於PVDF薄膜之可撓性，希冀未來能應用於非平面或不規則表面之力量量測。

Diaphragm-type structure is the most important configuration applied in the MEMS device. In this thesis, the mechanical and thermal-mechanical performances of the diaphragm structures are discussed. Some analytic and numerical solutions of the deformation equation of diaphragms are summarized in this research to predict the performance, stress and strain distribution, of diaphragm structures and to speed up the design and fabrication of micro devices
In the sensor fabrication, this thesis proposes three innovations of pressure sensors. The first one is the configuration modification of the diaphragm structure to fabricate a piezo-resistive pressure sensor which is applied in a high-pressure measurement. A strengthened diaphragm with adding a square fixed mesa is demonstrated to be elegant over the conventional design of piezoresistive high-pressure sensors. This argument is justified by the numerical simulation of the FEM software ANSYS through analyzing the stress of the silicon membrane as well as deriving the ideal output voltage of the high-pressure sensor. This calculated result of sensor performance is compared with the testing data of sensor prototype. This work also describes a fabrication concept of combining the mature silicon bulk-micromachining and new-developed low-temperature surface micromachining technologies to make the microfluidic system chip with both the sensing elements and the flowing channels. By using such an on-site measurement system we can implement the microfluidic experiment in the microchannel much easily and cost-effectively. 
The second innovation is to use a polymer material, PDMS, as a packaging material to seal the pressure chamber underneath the diaphragm. PDMS is a well-known material in MEMS technology recently. It is not only cheap but also has a merit of easily processing. We completed piezoresistive pressure sensors, made by the same batch, with different packaging materials of Pyrex glass and PDMS sheet in the paper, respectively. Spin-coating is accessed to control the thickness of PDMS sheet by assigning the silicon and Teflon disks as the supporting substrates for PDMS sheets. The sensors packaged by the PDMS room temperature bonding herein verified the similar performance as the ones packaged by the conventional anodic bonding through pressure testing. 
The third innovation is to fabricate a piezoresistive pressure sensor with a diaphragm size of 50μm × 50μm by utilizing CMOS MEMS technology. The material of the sensor diaphragm is silicon dioxide, and the piezoresistors are made by polysilicon. For releasing the diaphragms of the micro pressure sensors, this work proposes to use front-side etching technique with etching holes of 5 μm×5μm only. Finally, we use gelatin and parylene to seal the etching holes. 
Besides, a design and fabrication of a novel micro actuator device is also described in this research. This work presents a novel diaphragm type thermo-buckled microactuator with only a driving voltage of 3V and under a working temperature about 40℃. It’s a sandwich structure composed of a platinum (Pt) resistor between two parylene films with different thickness. The platinum resistor is assigned as a heating source. Therefore, the parylene diaphragm with different thickness of top and bottom layers is heated by the embedded Pt resistor. The different temperature rise along the thickness direction of the parylene diaphragm not only generates an out-of-plane thermo-buckling deformation, but also induces an asymmetric deflection inclined to upward or downward direction. The maximum displacement of the diaphragm is verified as 0.35 μm experimentally and with the cut-off frequency of 1000 Hz by an AC voltage of 3V in peak-to-peak magnitude.
This study also proposes a concept of fabricating a flexiable pressure sensor array made by a piezoelectric material PVDF foil. This sensor array is supposed to apply to measuring the pressure by a high-frequency AC carrier excitation.

目錄
中文摘要	Ⅰ
英文摘要	Ⅲ
目錄	VI
圖目錄	IX
表目錄	XV

第一章  緒論	1
1.1  微機電系統	1
1.2  研究動機	4
1.3  文獻回顧	6
1.4  研究目的	9
第二章 薄膜結構之力學分析	11
2.1  薄膜之結構力學特性	11
2.2  矽質薄膜之結構力學分析	17
2.3  矽之壓阻特性	19
2.5  薄膜式力感測器之性能評估參數	22
第三章 有限元素軟體模擬分析	28
3.1  ANSYS簡介	28
3.2  ANSYS特殊語法	32
3.3  ANSYS薄膜特性分析	34
第四章  矽質微型壓力感測器	35
4.1  研究目的	35
4.2  文獻回顧	36
4.3  壓力計種類	36
4.4  島塊式壓力計之模擬分析	38
4.5  島塊式薄膜壓力計製造	43
4.6  壓力計測試與量測	46
4.7  壓力計之實際應用	51
第五章  新型封裝方式之壓力感測器	62
5.1  研究目的	62
5.2  文獻回顧	64
5.3  PDMS材料特性	65
5.4  封裝製程	68
6.5  實驗測試暨討論	72
第六章  CMOS 微型壓力感測器	83
6.1  研究目的	83
6.2  文獻回顧	84
6.3  CMOS 壓力感測器設計	86
6.4  CMOS壓力感測器之模擬輸出預估	88
6.5  CMOS 壓力感測器後製程暨量測	95
6.6  CMOS 結果與討論	99
第七章  薄膜式熱制動器	105
7.1  研究目的	105
7.2  文獻回顧	106
7.3  熱挫曲式微型幫浦之設計	109
7.4  熱挫曲式微型幫浦之製作程序	115
7.5  量測與分析	118
第八章  PVDF 可撓式力感測器	123
8.1  文獻回顧	123
8.2  PVDF材料特性	124
8.3  PVDF壓力感測陣列製程	127
第九章  結論與未來建議	133
9.1  本文貢獻之彙整	133
9.2	未來建議	136
參考文獻	141
論文著述目錄	149

圖目錄
圖1.1 全世界第一具微小馬達之掃描式電子顯微鏡照片	2
圖1.2 微細加工技術之分類	3
圖1.3 論文結構之樹狀圖	10
圖2.1 薄膜結構與座標系統	12
圖2.2 1/4矩形薄膜結構式意圖	15
圖2.3 薄膜變性量與應力分布數值解	18
圖2.4 壓電阻位置示意圖	20
圖2.5 壓力薄膜上壓電阻受力變形情況	20
圖2.6 感測器輸出特性曲線	23
圖2.7 非線性度定義	24
圖2.7 非線性度定義（續）	25
圖2.8 遲滯現象	26
圖3.1 有限元素分析流程	29
圖4.1 壓力薄膜構型剖面	38
圖4.2 等比例放大之壓力計示意圖	39
圖4.3 網格分割後之模型	40
圖4.4 X-方向應力分佈圖(1/4晶片圖)	41
圖4.5 Y-方向應力分佈圖(1/4晶片圖)	41
圖4.6 薄膜變形示意圖(1/4晶片圖)	42
圖4.7 3V偏壓下壓力計之輸出電壓預測值	42
圖4.8 製作流程與光罩設計圖	44
圖4.9 ＜100＞凸角補償示意圖	44
圖4.10 電化學自動停止蝕刻裝置	46
圖4.11 切割後之壓力計晶片	46
圖4.12 壓力計晶片背面	47
圖4.13 打線封裝後之壓力計晶片	47
圖4.14 待測之壓力計	47
圖4.15 島塊式壓力計輸出電壓	48
圖4.16 全薄膜式壓力計輸出電壓	48
圖4.17 壓力薄膜之光學顯微鏡側視圖	49
圖4.18 壓力計之理論輸出值與實際輸出值比較圖	50
圖4.19 壓力計陣列晶片正面	51
圖4.20 壓力計陣列晶片背面	51
圖4.21 壓力測試機台	52
圖4.22 已黏貼於電路板並打線完成之待測壓力計陣列晶片	53
圖4.23 壓力測試機台管線示意圖	53
圖4.24 壓力陣列晶片輸出電壓	54
圖4.25 PDMS微流道上蓋與壓力計晶片整合示意圖	55
圖4.26 PDMS主劑與硬化劑	55
圖4.27 微流道結構光罩設計	56
圖4.28 微流道現地量測系統製程圖	57
圖4.29 SU-8微流道母模	57
圖4.30 PDMS微流道上蓋之外框架	58
圖4.31 整合後之微流道壓力現地量測平台	58
圖4.32 可控制體積流率之針筒幫浦	59
圖4.33 微流道內壓力現地量測實驗架設	59
圖4.34 工作流體於壓力計陣列中之流向	60
圖4.35 微流道內壓力分部之理論值與實際值比較	61
圖5.1 壓力計壓力腔體封裝示意圖	63
圖5.2 PDMS材料化學鍵結結構	65
圖5.3 PDMS氧氣電漿表面處理	66
圖5.4 壓力計晶片	69
圖5.5 固化後之PDMS	70
圖5.6 PDMS薄膜	70
圖5.7 PDMS封裝流程	71
圖5.8 PDMS與壓力計晶片接合後之待打線晶片	72
圖5.9 完成整體PDMS封裝製程之壓力計	72
圖5.10 實驗架設示意圖	73
圖5.11 Pyrex #7740玻璃封裝之輸出電壓	73
圖5.12 500μm PDMS封裝之輸出電壓	74
圖5.13 45μm PDMS封裝之輸出電壓	74
圖5.14 三種不同封裝製程之壓力計輸出比較	74
圖5.15 Pyrex #7740玻璃封裝之輸出電壓	76
圖5.16 500μm PDMS封裝之輸出電壓	76
圖5.17 45μm PDMS封裝之輸出電壓	76
圖5.18 PDMS氣體滲透路徑示意	78
圖5.19 壓力計內相關尺寸式意圖	78
圖5.20 數據擷取器	80
圖5.21 500μm厚PDMS封裝與7740玻璃封裝之壓力計比較	81
圖5.22 45μm厚PDMS封裝與7740玻璃封裝之壓力計比較	81
圖6.1 正面蝕刻與背面蝕刻成型薄膜之比較	86
圖6.2 CMOS 0.35μm 2P4M標準製程結構示意圖	86
圖6.3 CMOS 壓力感測器各層結構示意圖	87
圖6.4 X型金屬犧牲層與壓電阻位置示意圖	87
圖6.5 1/4壓力薄膜網格分割圖形	88
圖6.6 壓力薄膜 x應力分布圖	89
圖6.7 壓力薄膜 y方向應力分布圖	89
圖6.8 多晶矽摻雜濃度與電性關係	90
圖6.9 模擬輸出預估值與各種壓阻式壓力感測器之性能指標比較	94
圖6.10 單一壓力感測元件之佈局圖	95
圖6.11 CIC代工之壓力計陣列晶片	95
圖6.12 CMOS 壓力計後製程流程	96
圖6.13 兩種不同顏色之金屬犧牲層(10x100)	98
圖6.14 KOH蝕刻時出現之(100)亮面	98
圖6.15 光學顯微鏡下CMOS 壓力計晶片	99
圖6.16 打線後之CMOS 壓力感測晶片	100
圖6.17 以parylene填塞蝕刻孔洞	100
圖6.18 parylene封裝後之CMOS壓力計	101
圖6.19 CMOS壓力計訊號輸出	101
圖6.20 壓電阻位置與中性軸之關係	102
圖6.21 壓電阻位置與應變關係	103
圖6.22 第一層多晶矽(poly 1)壓電阻幾何形狀	103
圖7.1 聚對二甲苯沈積過程	107
圖7.2 聚對二甲苯N、C、D材料與化學結構	108
圖7.3 以ANSYS所建構之懸空薄膜模型	113
圖7.4 振動膜面之網格分割	113
圖7.5 有限元素軟體ANSYS模擬薄膜變形狀況	114
圖7.6 製作parylene空腔結構所使用之光罩	115
圖7.7 微幫浦薄膜空腔結構製作流程說明	116
圖7.8  微幫浦元件完成實景	117
圖7.9 實驗架設示意圖	118
圖7.10 逐步加大電壓而導致薄膜受熱變形	119
圖7.11 微幫浦作動時之紅外線熱影像儀照片	120
圖7.12　AVID光學干涉儀量測設備	120
圖7.13 無充填工作液體之薄膜作動情形	121
圖7.14 工作流體為水之薄膜作動情形	121
圖7.14 工作流體為水之薄膜作動情形（續）	122
圖8.1 PVDF壓電薄膜示意圖	125
圖8.2 PVDF壓電薄膜	125
圖8.3 壓電薄膜座標位置定義	125
圖8.4 PVDF感測陣列光罩設計圖	128
圖8.5 PVDF感測陣列製程流程圖	129
圖8.6 具底部電極之PVDF薄膜	130
圖8.7 完成上下電極製程之PVDF力感測器	130
圖8.8 可撓式PVDF微感測陣列	130
圖8.9 待測之PVDF微感測陣列	131
圖8.10 PVDF感測陣列	131
圖9.1 CMOS壓力計之理想輸出值比較	135
圖9.2 覆晶式夾治具	137
圖9.3 覆晶式夾治具爆炸視圖	137
圖9.4 訊號傳輸設備	138
圖9.5 氮化矽保護層毀損導致金屬線路被蝕刻	139
圖9.6 薄膜結構元件示意圖	140


 
表目錄
表1.1 體型加工控制膜厚之相關文獻	7
表2.1 薄膜變形與應力之相關係數	16
表2.2 在室溫中的壓阻係數值	19
表4.1 壓力薄膜幾何參數	39
表4.2 矽晶片之材料性質	40
表4.3 靈敏度與線性度（3V偏壓）	43
表4.4 輸出電壓值	47
表4.5 靈敏度與非線性度之比較（3V偏壓）	50
表5.1 PDMS薄膜詳細製程參數	70
表5.2 不同封裝製程整體比較	75
表5.3 三種不同封裝材之5號壓力計性能比較	77
表6.1 CMOS後製程應用於微機電技術文獻整理	85
表6.2 壓阻式壓力計之尺寸比較	92
表6.3 壓力計之性能指標評比	93
表6.4 後製程之相應蝕刻液及其比例	96
表7.1 40℃溫差之軸向負載及極限挫曲負載值	111
表7.2 40℃溫差時，懸橋中央之最大變形	112
表7.3 溫差40℃所造成之parylene薄膜變形	114

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