本論文提出兩種以SOPC (System On a Programmable Chip)為基礎之測試系統設計方法；其中一個是低成本、高品質的CMOS影像感測器（CMOS Image Sensor, CIS）之測試平台設計，另一個則是提升IC可靠度的Burn-In測試系統。本論文共分成三部分，在第一部分先介紹一個以多主從系統架構所實現的嵌入式即時影像處理平台，並在該平台上建構CMOS及LTM主控器等兩個硬體加速電路模組來加快影像擷取、前處理運算與影像即時顯示；此設計可減少軟核心處理器Nios II處理影像的運算時間，也可加強影像系統之即時分析能力，因此很適合應用於CIS之影像分析與數位信號處理等系統之應用設計上。論文的第二部分係以上述架構為基礎，提出一種不同於產業界現行設計方法的CIS測試架構，其可打破測試機台的專用性來降低測試成本。傳統的CIS測試機台有其專用性，價格難以降低；本論文提出以SOPC為基礎之CIS影像測試平台，搭配一般非專用功能的測試機共同組成微型化、低價位之CIS測試架構，不僅可以降低成本，更因影像傳輸距離的降低，使得影像測試品質得以大幅提升。在論文的最後一個部分，主要是討論一個IC Burn-In系統之設計，在現今IC的耗電量增加下，使得IC本身也會散發高熱，如何設計一個恆溫的系統是個很大的挑戰，且Burn-In測試對於提升IC的可靠度有著關鍵性的影響。本文提出以SOPC為基礎之模糊控制器( Fuzzy Controller )設計，來控制Burn-In系統的加熱器與風扇轉速，並取得其動態平衡。最後的實驗結果得知，本論文所實現之模糊控制器除了具有極佳的反應時間外，也可在滿足規格需求下有效改善系統的性能，驗證所提之架構確實可提供產業界多種測試問題有效之解決方案。

In this dissertation, two SOPC-based methods for testing systems are proposed. One is a low cost and high quality testing platform designed by CMOS Image Sensor (CIS), and the other is a Burn-In testing system that can effectively enhance the IC reliability. There are three parts in this dissertation. First, an embedded real time image processing platform with a CMOS Master module and a LTM Master module is introduced. These modules can accelerate the image acquisition and pre-processing operation and real- time image display. This platform can reduce the image processing operation time of Nios II core processor and enhance the real time analysis capability of the image system. It is very suitable to be applied in the design of CIS image analysis and digital signal processing system. Second, a CIS testing architecture is proposed to break the specific usage nature of the testing machine to reduce the test cost. Traditional CIS testing equipment has difficulty to drop the price because of its specific usage. In this dissertation, a SOPC based CIS image testing platform is proposed, which can be associated with a general non-specific usage function testing equipment to compose together the miniaturized and low cost CIS testing architecture. Due to the reduction of the image transfer distance, the image testing quality can be enhanced greatly. Finally, an embedded fuzzy controller is used to control the rotational speed of the heater and electric fan of Burn-In system so that it is in a dynamic equilibrium. The realized fuzzy controller not only possess excellent response time but also improves the system performance effectively under the satisfaction of the spec requirement.

Contents

Chapter 1
Introduction	1
1.1 Background	1
1.2 Research Objective	7
1.3 Paper Architecture	8
Chapter 2
Design of Embedded Real-Time Image Processing Platform Based on SOPC Technique	9
2.1	Introduction	9
2.2 Environment of Hardware/Software Co-design	10
2.2.1 DE2-70 Multimedia Development Board	10
2.2.2 CMOS Image Sensor Module	11
2.2.3 LTM Module	14
2.2.4 SOPC Development Environment	14
2.3 Image Processing Architecture Based on SOPC	16
2.3.1 Design of Hardware Architecture of CIS Image Capture and Display	16
2.3.2 Design of Real-time SOPC-Based Image Processing Platform	18
2.4 System Verification and Experiment	19
2.4.1 Experiment 1: Basic processing of image	19
2.4.2 Experiment 2: Color separation principle and object localization	24
2.5 Conclusions	27
Chapter 3
Novel SOPC-Based CMOS Image Sensor Testing System	28
3.1 Introduction	28
3.2 Testing Platform of Traditional Chip and CIS Chip	30
3.3 SOPC-Based CMOS Testing Platform	35
3.3.1 Introduction of SOPC Testing Platform Module	36
3.4 Experimental Results	41
3.5 Conclusions	43
Chapter 4
Novel Design for a Burn-In System	44
4.1 Introduction	44
4.2 Burn-In Testing System	46
4.2.1 Traditional Burn-In Testing System	46
4.2.2 Improved Burn-In Testing System	49
4.3 Temperature Control System for Burn-In Test	54
4.3.1 Introduction of PI Temperature Control System	54
4.3.2 Fuzzy Temperature Control System	56
4.4 Experimental Results	62
4.5 Conclusions	65
Chapter 5
Conclusions	69
5.1 Summary	69
5.2 Future Research	71
References	74
Publications	78
Patents	80
 

List of Figures

Fig. 1.1 IC development flow.	2
Fig. 1.2 Service items of testing plant.	3
Fig. 1.3 Auto Testing Equipment, ATE (Agilent 93000).	5
Fig. 1.4 Circuit probe at wafer level.	5
Fig. 1.5 Final test in the packaging level.	6
Fig. 2.1 Altera DE2-70 development board.	11
Fig. 2.2 DE2-70 option board. (a) TRDB-D5M CMOS image sensor module, (b) TRDB-LTM module.	11
Fig. 2.3 The internal functional block diagram of CMOS image sensor.	12
Fig. 2.4 CIS image capture processing flow.	12
Fig. 2.5 Raw image data.	13
Fig. 2.6 RAW2RGB module.	13
Fig. 2.7 LTM module block diagram.	14
Fig. 2.8 Nios II microprocessor core architecture diagram.	15
Fig. 2.9 SOPC/ Nios II development process.	16
Fig. 2.10 Image capture and display architecture diagram.	17
Fig. 2.11 Upper layer circuit architecture of image capture and display.	17
Fig. 2.12 Image processing platform of multiple master-salve architecture.	18
Fig. 2.13 Internal block diagram of CMOS master module.	19
Fig. 2.14 Grey level treatment. (a) Original image, (b) Converted into grey level image, (c) The generation of histogram, (d) Binarization image.	20
Fig. 2.15 Pepper salt noise and mean value filtering. (a) Mobdule containing Pepper salt noise module, (b) Module after mean value filtering.	21
Fig. 2.16 Median filtering experiment. (a) Image of pepper salt noise, (b) Result of median filtering.	21
Fig. 2.17 3×3 mask.	22
Fig. 2.18 Dilation and erosion treatment result. (a) Original image, (b) Sobel edge detection, (c) Erosion, (d) Dilation.	23
Fig. 2.19 Color separation principle.	24
Fig. 2.20 Object detection of specific color. (a) Original image, (b) Acquisition of the red part of the object.	25
Fig. 2.21 Skin color detection. (a)Original image, (b) Acquisition of skin color part.	27
Fig. 3.1 Application of CMOS Image sensor.	29
Fig. 3.2 General IC testing process.	31
Fig. 3.3 Block Diagram of CIS chip.	32
Fig. 3.4 Testing block diagram for CMOS IC.	32
Fig. 3.5 CIS chip testing system with data capture card.	33
Fig. 3.6 CIS chip testing system connect to PC.	34
Fig. 3.7 Real illustration of Aglient HP93000IP.	34
Fig. 3.8 Architecture of image transmission system.	35
Fig. 3.9 I2C write protocol.	36
Fig. 3.10 I2C read protocol.	36
Fig. 3.11 System architecture of image hardware accelerator.	37
Fig. 3.12 Illustration of graphic data of Bayer Pattern.	38
Fig. 3.13 Bayer to RGB module.	38
Fig. 3.14 DE2-70 platform for CIS test.	41
Fig. 3.15 CIS SOPC solution.	42
Fig. 3.16 PGA Pass test.	42
Fig. 3.17 PGA Fail test.	42
Fig. 3.18 ADC Pass test.	42
Fig. 3.19 ADC Fail test.	42
Fig. 4.1 Bathtub Curve.	45
Fig. 4.2 IC testing process.	46
Fig. 4.3 Traditional Burn-In board. (a) Outward, (b) Architecture.	47
Fig. 4.4 Traditional Burn-In oven. (a) Outward, (b) Perspective.	48
Fig. 4.5 Traditional Burn-In Challenge. (a) Power consumption trends, (b) Temperature mutual interference within the chamber, (c) IC temperature might be higher than the Burn-In setup temperature.	51
Fig. 4.6 Improved socket includes a fan, a temperature sensor, and a heat dissipater.	51
Fig. 4.7 Improved sockets installed in a Burn-In board. (a) Outward, (b) Architecture.	52
Fig. 4.8 Illustration of the proposed independent temperature controlled Burn-In system.	54
Fig. 4.9 Block diagram of the traditional PI temperature controller for the Burn-In test.	56
Fig. 4.10 Block diagram for fuzzy controller. (a) Fuzzy temperature controller for the fan, (b) Fuzzy temperature controller for the heater.	58
Fig. 4.11 Membership functions of fuzzy controllers: (a) Membership functions of the error value ef of fan. (b) Membership functions of the error eh of heater. (c) Membership functions of the error variation cef of fan. (d) Membership functions of the error variation ceh of heater. (e) Membership functions of the voltage variation
variation ceh of heater. (e) Membership functions of the voltage
variation ΔVf of fan. (f) Membership functions of the voltage
variation ΔVh of heater. ................................................................62
Fig. 4.12 Response time chart of PI controller in the temperature control
system...........................................................................................63
Fig. 4.13 Response time chart of fuzzy controller in the temperature
control system. .............................................................................64
Fig. 4.14 Comparison chart of response time of the PI controller and the
fuzzy controller in the temperature control system. ....................64
Fig. 4.15 IC and socket damage. (a) Surface discoloration, (b) Solder ball
melted, (c) Solder ball discoloration, (d) Socket damage............67
Fig. 5.1 Testing block diagram for MIPI option. (a) On-board solution
signal chart, (b) PE solution signal chart. ....................................72
Fig. 5.2 SOPC solution for MIPI. .............................................................73

List of Tables
Table 2.1 Time needed by image processing module (Resolution:
800X480). ....................................................................................23
Table 3.1 Test time. ...................................................................................43
Table 4.1 Fuzzy rule base of the fuzzy control of the fan. .......................60
Table 4.2 Fuzzy rule base of the fuzzy control of the heater. ...................60
Table 4.3 Performance comparison between PI and fuzzy controller. .....65

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