人體通訊(Human Body Communication)是WBAN(Wireless Body Area Network)中的一種通訊方式，把人體當作通道來傳送訊號。無線通訊和醫療的需求增加，IEEE制定了802.15.6此人體通訊標準，與其它IEEE802.15 無線標準相比，該無線通訊技術對人體安全有非常高的要求並且需要好的QoS(Quality of Service)與數據速率與低功耗等。
近年來，注入鎖定(Injection-locked)的技術大量的使用於OOK或FSK的超低功耗接收器上，OOK一般適用於短距離無線運用，以及在發送'0'時節省發送功率但相比FSK抗雜訊能力較差。Injection-locked的靈敏度保持在最高值，才能確保喚醒接收器在最高的靈敏度，以FSK為調變的接收器上，當接收器接收到'1'的訊號時，注入鎖定振盪器會輸出較大的電壓振幅；反之，當接收訊號為'0'時，注入鎖定振盪器則輸出較小振幅。此外，接收器所接收的訊號強弱會隨著與發射器的距離不同而改變，為了達到省電的目的，此論文提出了一利用數位方式完成的校正機制，藉由控制注入鎖定振盪器電壓，來確保注入鎖定振盪器在製程、溫度、電壓改變下能夠正常運作，以及優化接收不同強度訊號時之功耗。
在校正電路方面，是利用SAR(Successive approximation)邏輯來控制注入鎖定振盪器的功耗。首先發射器會先傳送一連串足夠的'1'訊號來校正電路，若接收端接收到FSK訊號為 '1' 使得注入鎖定振盪器振盪，振盪訊號藉由波峰偵測器轉為直流電壓，再與比較器之參考電壓做比較會得到'1'的輸出結果，邏輯控制會繼續SAR搜尋，直到接收訊號'1'時振盪器不再震盪結束搜尋，相反的，若接收'1'訊號振盪器無法使振盪器振盪，則邏輯控制執行SAR搜尋，直到振盪器振盪。結束SAR搜尋後，數位控制會找到一個數位控制碼Dlow，Dlow是在接收訊號為'1'時能夠維持振盪的最低的數位控制碼。在傳送一連串的'1'訊號後是一連串的'0'訊號，邏輯控制執行SAR搜尋，搜尋到數位控制碼Dhigh，Dhigh是在接收訊號為'0'時能無法振盪的最高的數位控制碼。在Dlow與Dhigh區間是能夠確保振盪器在製程、電壓、溫度及接收訊號強度下能夠良好的運作，Dlow與Dhigh中間值則是我們所需之最安全的操作點。
本論文使用UMC18製程實現應用於人體通訊之低功耗接收器設計，本論文接收器消耗79μW時靈敏度為-76.9 dBm，此時傳輸速度為為100 kb/s，此時電路接收每單位資料所需之能源消耗為0.79 nJ/bit。

Human Body Communication (HBC) is a communication method in Wireless Body Area Network(WBAN), which uses the human body as a channel to transmit signals. The demand for wireless communication and medical care has increased. The IEEE has established the human body communication standard 802.15.6. Compared with other IEEE802.15 wireless standards, the wireless communication technology has requiremented very high for human safety and good Quality of Service(QoS)、data rate and low power consumption.
In recent years, injection-locked has been used extensively on ultra low-power OOK/FSK receiver. Compared to FSK, OOK is generally suitable for short-range wireless applications, and save power when sending digital signal '0'.Sensitivity of the injection-locked oscillator is maximized to ensure the entire wake-up receiver has a maximized sensitivity. For an FSK receiver, as data ‘1’ is received, the output voltage swing of the injection-locked oscillator should be larger than received data ‘0’. On the contrary, as data ‘0’ is received, the output voltage swing of the injection-locked oscillator should be smaller than received data ‘1’.
  In the aspect of calibration, we use SAR (Successive approximation) logic to control the power consumption of the injection-locked oscillator. The transmitter transmitted a series of data '1' in the preamble of a transmitted data frame. The length of the series of data '1' is long enough for performing the calibration. If the received FSK signal with a data of '1' let the injection-locked oscillator output a oscillating signal. The oscillating signal will be converted into a DC voltage by the envelope detector. After comparing the output DC voltage of the envelope detector with a pre-defined threshold voltage, the comparator outputs a data of '1'. Then the control logic performs the SAR search until the injection-locked oscillator stop oscillation under the data of '1' is received. On the contrary, if the injection-locked oscillator is not oscillated, the comparator outputs a data of '0' and the control logic performs the SAR search to make the injection-locked oscillator under oscillation.After the SAR search, the lowest digital code (Dlow) for maintaining the injection-locked oscillator oscillating under received a data of '1' is found. The data after a series of '1' in the preamble of the transmitted data frame is a series of '0'. Then the control logic performs the SAR search to find the highest digital code (Dhigh) for maintaining the injection-locked oscillator not to oscillate under received a data of '0'. As shown in Fig. 3, the control code between the Dhigh and the Dlow can guarantee the injection-locked oscillator operating well under the condition of process, voltage, temperature (PVT) and the received signal strength. For having a largest safe window of operation, the middle code between the Dhigh and the Dlow can be chose.
  The digital auxiliary injection-locked calibration for ultra-low-power wake-up receiver is implement in UMC 0.18 µm CMOS process with supply voltage of 1.8 V. Under a power consumption of 100μW, the receiver has a sensitivity of -76.9 dBm and a energy consumption per received bit of 0.79 nJ/bit.

目錄
中文摘要......................................................................................I 
ABSTRACT	II
目錄	IV
圖目錄	VI
表目錄	IX
第一章	緒論	1
1.1  研究背景	1
1.2  研究動機	2
1.3  論文架構	3
第二章	頻率鍵移接收器系統考量	4
2.1  接收器電路之類別與介紹	4
2.2  頻率鍵移解調之類別與介紹	12
2.3具校正之注入鎖定振盪器	17
第三章	人體通訊介紹與應用	18
3.1 人體區域網路介紹	18
3.2 IEEE 802.15.6之標準	18
3.3人體通訊應用	20
第四章  低功耗接收器電路設計	21
4.1注入鎖定之低功耗接收器	21
4.1.1前置放大器(Pre Amplifier)	21
4.1.2  振盪器	25
4.1.3 波峰偵測器	30
4.1.4  比較器	31
4.1.5  電流操作數位類比轉換器	33
4.1.6  電路校正系統	35
4.2電路模擬結果	37
4.2.1低功耗注入鎖定之接收器模擬結果	37
4.2.2 7 bits數位類比轉換器模擬結果	39
4.3  電路佈局	44
第五章  電路量測	45
5.1量測方式	45
第六章  結論與未來展望	47
參考文獻(References)	48
附錄A	50
圖目錄
圖2. 1超再生接收器前端電路架構[1]	5
圖2. 2ASK超低功耗無線傳輸晶片電路架構[2]	6
圖2. 3 FSK超低功耗接收器完整架構圖[3]	7
圖2. 4 PSK之SIF接收器解調電路架構圖[4]	8
圖2.5利用Injection Locked Frequency Divider達成頻率轉振幅之目的以進行解調[5]…………………………………………………………..10
圖2. 6解調OOK/FSK/PSK之超低功耗喚醒接收器之完整架構圖[6]10 
圖2. 7(A) OOK、(B) FSK及(C)PSK解調原理[6]	11
圖2. 8連續式頻率鍵移之調變[7]	13
圖2. 9離散式頻率鍵移之調變[7]	13
圖2. 10使用類比混頻器與延遲電路達到解調目的之架構圖[8]	14
圖2. 11DLL/PLL-BASED解調之架構圖[9]	15
圖2. 12DLL/PLL-BASED解調之示意圖[9]	16
圖2. 13數位電路進行解調之示意圖[10]	16

圖3. 1 IEEE802.15.6頻率頻寬[12]	19

圖4. 1注入鎖定之低功耗接收器架構	21
圖4. 2M級雜訊指數串接形式	22
圖4. 3共源級放大器主要雜訊源之電路圖	24
圖4. 4回授系統	25
圖4. 5使用主動電路提供負阻	26
圖4. 6串聯結合轉換為並聯結合	26
圖4. 7轉為三個並聯元件	26
圖4. 8交錯偶合對	28
圖4. 9交錯偶合對之等效電路	28
圖4. 10注入鎖定振盪器電路圖	29
圖4. 11波峰偵測器電路	30
圖4. 12 RC充放電過程	30
圖4. 13比較器	31
圖4. 14比較器VOUT與VIN關係圖	32
圖4. 15電流單元之電路架構	34
圖4. 16七位元之數位類比轉換器之電路架構	34
圖4. 17低功耗接收器之解調系統	36
圖4. 18 SAR邏輯控制的輸出數位編碼	36
圖4. 19 VERILOG模擬結果	37
圖4. 20 PRE-AMPLIFIER之模擬(A)電壓增益以及(B)雜訊指數	38
圖4. 21100kb/s訊號輸入與解調輸出模擬圖(頻率分別是10MHz與20MHz)	………………………………………………………………….38
圖4. 22七位元數位類比轉換器模擬圖(TT, 25度)	40
圖4. 23七位元數位類比轉換器模擬圖(FF, 0度)	41
圖4. 24七位元數位類比轉換器模擬圖(SS, 75度)	41
圖4. 25電路佈局相對位置圖	44
圖4. 26電路佈局圖CHIP SIZE : 1.15 X 0.87mm^2  	44

圖5. 1接收器解調量測示意圖	45
圖5. 2數位校正示意圖	46





表目錄
表2. 1 ASK,FSK,PSK文獻比較表	12
表4. 1電路預計規格表	42
表4. 2參考文獻規格比較表	43

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