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中文論文名稱 高效率的嵌入式自然影像監控系統之硬體設計
英文論文名稱 Hardware Design of High-Efficiency Embedded Natural Image Surveillance System
校院名稱 淡江大學
系所名稱(中) 電機工程學系碩士班
系所名稱(英) Department of Electrical And Computer Engineering
學年度 108
學期 1
出版年 109
研究生中文姓名 魏成恩
研究生英文姓名 Cheng-En Wei
學號 605450211
學位類別 碩士
語文別 中文
口試日期 2020-01-06
論文頁數 54頁
口試委員 指導教授-江正雄
委員-李世安
委員-夏至賢
委員-許明華
中文關鍵字 監控系統  對比增強  直方圖等化  即時處理  參數導向直方圖等化 
英文關鍵字 Surveillance System  Contrast Enhancement  Histogram Equalization  Real-Time Processing  Parametric-Oriented Histogram Equalization 
學科別分類 學科別應用科學電機及電子
中文摘要 監控系統( Surveillance System )雖能忠於現實的場景擷取出影像,但是擷取出的影像不一定具有鮮明的紋理表現以及亮度正規化的特性能夠提供給人體視覺系統HVS( Human Visual System , HVS )視覺愉悅感。有鑑於此,不少市面上的監控系統也已經配合市場需求增加了對比增強( Contrast Enhancement )的功能。現今市面上監控系統的產品雖具有對比增強的架構,但是犧牲了監控系統必要的即時處理( Real-Time )的效能,造成記憶體( Memory )過大和運算時間( Computing-Time )過長。因此本文透過改良式的參數導向直方圖等化( Parametric-Oriented Histogram Equalization , POHE ),透過counter的方法解決原始POHE的記憶體的大量使用以及LUT( Look-UP Table )的方法加速了運算速度,達成及時處理(Real-Time)的特性以利監控系統的後續使用。本文將以改良式的參數導向直方圖等化POHE 架構,保持即時處理的特性並且強化影像的細節和亮度正規化,實現在Altera DE2系列的 DE2i-150 FPGA Development Board上。
英文摘要 Although a surveillance system can capture images accurately according to the actual scene, the captured images do not necessarily have sharp texture expression and brightness normalization characteristics, which can provide human visual system with visual pleasure sense. In order to solve the drawbacks, currently many monitoring systems have added the Contrast Enhancement function to meet the market needs. Although the monitoring systems on the market today have a contrast-enhanced scheme, they may sacrifice real-time performance required by the monitoring system due to too large memory needed and too much computing time. Therefore, in this work, we use an improved parametric-oriented histogram equalization (POHE) to enhance the contrast of images. Conventional POHE may use massive memory, but the proposed improved POHE uses a counter to overcome massive memory usage problems. We also employ the look-up table (LUT) technique to accelerate the calculation speed. Therefore, real-time processing is achieved to facilitate the subsequent use of the monitoring system. Besides, this research uses an improved POHE architecture to maintain the characteristics of real-time processing, and enhance the detail and brightness normalization of the image. We implement the modified POHE on DE2i-150 FPGA Development Board of the Altera DE2 series. The emulation results prove the proposed POHE can enhance the contrast of an image efficiently.
論文目次 目錄
中文摘要 I
英文摘要 II
目錄 IV
圖目錄 VII
表目錄 X
第一章 緒論 1
1.1研究目的與動機 1
1.2論文架構 2
第二章 認識監控系統的成像 3
2.1感光耦合元件( Charge Coupled Device , CCD ) 3
2.2互補式金屬氧化物半導體( Complementary Metal-Oxide Semiconductor , CMOS ) 4
第三章 影像對比調整文獻 5
3.1全域性直方圖等化( Global Histogram Equalization , GHE ) 5
3.1.1演算法-流程圖 6
3.1.2強化結果 6
3.2區域性直方圖等化( Local Histogram Equalization , LHE ) 7
3.2.1自適性直方圖等化( Adaptive Histogram Equalization , AHE ) 8
3.2.2對比限制自適性直方圖等化( Contrast Limited Adaptive Histogram Equalization , CLAHE ) 11
第四章 參數導向直方圖等化( Parametric-Oriented Histogram Equalization , POHE ) 21
4.1 積分圖(Integral Image) 23
4.2 演算法流程圖 28
4.3 強化結果 29
第五章 提出的參數導向直方圖等化( Parametric-Oriented Histogram Equalization, POHE) 32
5.1 改良的積分圖 (Modify’s integral image) 32
5.2 誤差函數LUT 34
5.3演算法流程圖 39
5.4強化結果 40
第六章 實驗結果與比較 43
6.1 影像品質之比較 43
6.1.1熵(Entropy) 44
6.1.2銳利度(Sharpness) 46
6.1.3影像品質結果之比較 46
6.2 影像計算時間之比較 46
6.3 硬體資源之比較 47
第七章 結論 50
參考文獻 51


圖目錄
Figure 1圖3.1全域性直方圖等化流程圖 6
Figure 2圖3.2 GHE強化結果圖(512×512) 7
Figure 3圖3.3區域直方圖所計算的區域示意圖(黑點為強化的像素x_(i,j),咖啡色區塊為該像素所需的區塊) 8
Figure 4圖3.4 AHE流程圖 9
Figure 5圖3.5 AHE強化結果圖(512×512) 11
Figure 6圖3.6灰階直方圖裁切示意圖 12
Figure 7圖 3.7 結構為512x512 大小的影像被均勻地劃分為64 個大小為64x64 的區塊,每個區塊個別以虛線交集的中心統計出轉移函數[10] 14
Figure 8圖3.8 (a)IR區域示意圖(b)在(i,j)區域的第一象限內,像素p與最靠近的4個轉移函數[10] 15
Figure 9圖 3.9 (a)BR區域與鄰近區域示意圖(b)在(i,j)區域的第二象限內,像素p與最靠近的2個轉移函數之間的關係(轉載[23]) 16
Figure 10圖 3.10 影像左上角與周圍區域的結構 17
Figure 11圖3.11無重疊CLAHE流程圖 18
Figure 12圖3.12無重疊CLAHE強化結果圖(512×512) 20
Figure 13圖4.1誤差函數 21
Figure 14圖4.2積分圖概念圖 24
Figure 15圖4.3 積分圖範例(M=N=3) 27
Figure 16圖4.4積分圖與原始存取影像比較示意圖(虛線為積分圖,實現為原始存取) 28
Figure 17圖4.5原始POHE演算法流程圖 29
Figure 18圖4.6 POHE強化結果圖(512×512) 31
Figure 19圖5.1 RAM : 2-PORT 32
Figure 20圖5.2 Modify’s integral image 33
Figure 21圖5.3 Modify’s integral image示意圖 33
Figure 22圖5.4 Floating point to single precision and sign bit module 35
Figure 23圖5.5 誤差函數LUT的正負數查表 36
Figure 24圖5.6誤差函數LUT(b31~b30) 36
Figure 25圖5.7 誤差函數LUT (b29~b28) 37
Figure 26圖5.8 誤差函數LUT(b27~b26) 37
Figure 27圖5.9 誤差函數LUT(b25~b24) 38
Figure 28圖5.10 誤差函數LUT示意圖 39
Figure 29圖5.11 改良後POHE演算法流程圖 40
Figure 30圖5.12 改良的POHE強化結果圖(512×512) 42
Figure 31圖6.1軟體與硬體的強化效果比較圖 44


















表目錄
表 1、影像品質比較表 46
表 2、計算時間之比較表 47
表 3、積分圖架構與改良式架構之比較表 47
表 4、整體RAM資源比較表 48
表 5、整體硬體資源比較表 49













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