本論文主要探討如何設計自組式模糊系統與實現模糊系統晶片及其應用。自組式模糊系統只須少量歸屬函數的參數便能建構模糊系統，利用遺傳演算法搜尋最佳參數解使其建構的模糊系統具有較高的效能。進一步以VHDL硬體描述語言來設計具有高彈性與處理速度較快的自組式模糊系統硬體電路並實現在FPGA晶片中，另外設計一個應用程式讓使用者輸入歸屬函數的參數與規則庫便能輕易地產生所需模糊系統的VHDL硬體電路程式碼。本論文以「二輸入單輸出」的倒單擺控制系統為例成功的完成基於遺傳演算法的自主式模糊系統設計及模糊系統硬體電路設計與驗證。在完成自組式模糊系統的硬體電路設計之後，本論文提出通用非同步收發傳輸器IP的設計並結合模糊系統硬體電路與Nios嵌入式處理器以實現模糊系統晶片。本論文利用Nios處理器中的UART介面傳輸歸屬函數參數與規則庫資料以建構所需的模糊系統。因此所設計的模糊系統晶片可應用在各種控制問題上並輕易的讓使用者依照所需的控制問題設計模糊系統晶片。此外，本論文設計一個系統開發介面，提供使用者可以藉由此開發介面來設定所想要的模糊系統參數以及規則庫資訊等，並且可以自動產生Nios嵌入式處理器之C語言程式碼、自動編譯、下載整合與ISP功能，其可以讓使用者很輕易的依實際需要設定所需模糊系統晶片。最後以兩種不同形式的控制問題來做應用，分別為「單輸入單輸出」的汽車跟隨防撞系統與「三輸入三輸出」的無線遙控全方位移動系統，以驗證所提的模糊系統晶片之設計與實現確實有效且可行。

In this dissertation, a design and implementation of a fuzzy system chip is proposed. First, a self-generating method based on a genetic algorithm (GA) is proposed to automatically construct a high performance fuzzy system. Then, a fuzzy system hardware design method by using VHSIC hardware description language (VHDL) is proposed so that the fuzzy system hardware implemented on an FPGA chip has a great flexibility and a high process speed. Moreover, a friendly-used software tool is developed to automatically generate VHDL codes for the users to easily design their fuzzy system hardware based on the proposed method. Some simulation results of an inverted pendulum control system are presented to illustrate the efficiency and feasibility of the proposed GA-based method in the fuzzy system design and hardware implementation. Furthermore, an intellectual property (IP) design method of universal asynchronous receiver and transmitter (UART) is proposed to integrate with fuzzy system hardware and soft IP of the Nios microprocessor for implementation of fuzzy system chip on an FPGA chip. The function of UART in Nios is used to construct a serial communication interface so that it can be used to transmit the design parameters of membership functions and rule base to set up the desired fuzzy system. Therefore, the implemented fuzzy system chip is a multi-applications chip, which can be organized by the users to design their fuzzy systems based on their applications. Besides, a system development application program is created to set up an interface so that the users can quickly use it to design their fuzzy systems by setting some parameters. Finally, in order to illustrate the multi-applications and effectiveness of the proposed fuzzy system chip, one-input-one-output car-following system and three-inputs-three-outputs remote-controlled omnidirectional mobile system are designed and implemented.

第一章	緒論.............................................1
1.1 研究背................................................1
1.2 論文內容..............................................8
    1.2.1 基於遺傳演算法之模糊系統設計....................8
    1.2.2 以VHDL及FPGA設計實現模糊系統晶片................9
    1.2.3 可程式模糊系統單晶片之設計......................9
    1.2.4 可程式模糊系統單晶片之應用.....................10
1.3 論文架構.............................................10
第二章	基於遺傳演算法之模糊系統設計....................12
2.1 自組式模糊系統.......................................14
2.2 基於遺傳演算法之模糊系統設計.........................19
2.3 在倒單擺控制系統上的模擬驗證.........................22
第三章	以VHDL及FPGA設計實現模糊系統晶片................29
3.1 模糊系統硬體電路設計.................................29
3.2 模糊系統硬體自動化設計...............................44
3.3 在倒單擺系統上的實體驗證.............................46
第四章	可程式模糊系統單晶片之設計......................51
4.1 UART硬體設計.........................................52
    4.1.1 鮑率產生器電路設計.............................53
    4.1.2 串列傳輸接收器電路設計.........................55
    4.1.3 串列傳輸發送器電路設計.........................61
4.2 可串列規劃之模糊系統晶片硬體設計.....................68
4.3 結合Nios嵌入式軟核心處理器之模糊系統單晶片設計.......72
4.4 模糊系統單晶片之軟體自動化設計.......................73
第五章	可程式模糊系統單晶片之應用......................80
5.1 「單輸入單輸出」之汽車跟隨防撞系統...................81
5.2 「三輸入三輸出」之無線遙控全方位移動系統.............87
第六章	結論與未來展望.................................104
6.1 結論................................................104
6.2 未來展望............................................105
參考文獻................................................106
研究著作................................................114
圖目錄
圖1.1 模糊控制系統的基本架構圖………….…………………………….2
圖2.1 格狀分割方式示意圖………………………………………………13
圖2.2 模糊推論法示意圖…………………………………………………13
圖2.3 三角形歸屬函數……………………………………………………15
圖2.1 前件部模糊集合示意圖……………………………………………18
圖2.2 後件部模糊集合示意圖……………………………………………18
圖2.3 遺傳演算法流程圖…………………………………………………20
圖2.4 倒單擺架構圖………………………………………………………22
圖2.5 輸入變數x1之歸屬函數圖………………………………………….27
圖2.6 輸入變數x2之歸屬函數圖………………………………………….27
圖2.7 輸出變數y之歸屬函數圖…………………………………………..27
圖2.8 7 個不同初始狀態的系統響應圖：(a)傳統模糊系統，(b)基於遺傳
演算法的模糊系統…………………………………………………………28
圖2.9 兩個不同初始狀態下的系統響應圖………………………………28
圖3.1 模糊系統硬體方塊圖………………………………………………31
圖目錄
IV
圖3.2 模糊集合硬體實現示意圖…………………………………………31
圖3.3 模糊系統硬體結構圖………………………………………………33
圖3.4 8 個管線步驟的運算流程圖………………………………………...39
圖3.5 模糊系統硬體電路方塊圖…………………………………………40
圖3.6 在Fuzzy toolbox 中輸入與輸出的歸屬函數，(a)輸入變數x1，(b)
輸入變數x2，(c)輸出變數y…………………………………………………41
圖3.7 模糊系統硬體電路的模擬圖………………………………………42
圖3.8 模糊系統Matlab 的模擬圖…………………………………………42
圖3.9 模糊系統輸出結果(a)Matlab fuzzy toolbox 的軟體模擬結果(b)硬體
電路的輸出結果…………………………………………………………....43
圖3.10 模糊系統於軟體與硬體電路輸出的誤差圖……………………..43
圖3.11 多工器電路產生器範例，(a)多工器模組外觀，(b)VHDL 產生器
介面，(c)Borland C++ 程式碼，(d)產生的VHDL程式碼…………………45
圖3.12 模糊系統硬體電路產生器………………………………………..46
圖3.13 倒單擺控制系統方塊圖…………………………………………..49
圖3.14 利用MAX+plus II 10.2 EDA 工具實現的倒單擺模糊控制系統方
塊圖…………………………………………………………………………49
圖3.15 電位計之電壓值與FPGA 晶片輸出信號在示波器上的量測圖，
(a)1.8V 電壓值，PWM 輸出99%的責任週期，”10”的轉向控制信號，(b)
2.2V 電壓值，PWM 輸出50%的責任週期，”10”的轉向控制信號，(c)2.5V
電壓值，PWM 輸出0%的責任週期，”00”的轉向控制信號，(d)2.6V 電壓
值， PWM 輸出20% 的責任週期， ”01”的轉向控制信
號……………………………………………………………………………50
圖目錄
V
圖4.1 可程式模糊系統單晶片架構圖……………………………………52
圖4.2 UART 傳輸示意圖…………………………………………………..53
圖4.3 鮑率產生器方塊圖…………………………………………………54
圖4.4 鮑率產生器功能模擬圖……………………………………………55
圖4.5 sel = “000” 時的功能模擬圖……………………………………….55
圖4.6 以bclkx8作串列資料信號的取樣示意圖………………………….56
圖4.7 串列傳輸接收器功能方塊圖………………………………………57
圖4.8 串列傳輸接收器流程圖……………………………………………60
圖4.9 串列傳輸接收器功能模擬圖，(a) 5 個位元資料、無同位元檢查、1
個停止位元，(b) 6 個位元資料、無同位元檢查、1 個停止位元，(c) 7 個
位元資料、無同位元檢查、1 個停止位元，(d) 8 個位元資料、無同位元
檢查、1 個停止位元，(e) 5 個位元資料、奇同位檢查、1 個停止位元，(f)
5 個位元資料、偶同位檢查、1 個停止位元，(g) 5 個位元資料、無同位
元檢查、1.5 個停止位元，(h) 5 個位元資料、無同位元檢查、2 個停止位
元……………………………………………………………………………61
圖4.10 串列傳輸發送器功能方塊圖……………………………………..62
圖4.11 串列傳輸發送器流程圖……………………………………………64
圖4.12 串列傳輸發送器功能模擬圖，(a) 5 個位元資料、無同位元檢查、
1 個停止位元，(b) 6 個位元資料、無同位元檢查、1 個停止位元，(c) 7
個位元資料、無同位元檢查、1 個停止位元，(d) 8 個位元資料、無同位
元檢查、1 個停止位元，(e) 5 個位元資料、奇同位檢查、1 個停止位元，
(f) 5 個位元資料、偶同位檢查、1 個停止位元，(g) 5 個位元資料、無同
位元檢查、1.5 個停止位元，(h) 5 個位元資料、無同位元檢查、2 個停止
圖目錄
VI
位元…………………………………………………………………………65
圖4.13 UART IP 電路方塊圖………………………………………………66
圖4.14 UART IP 產生器……………………………………………………67
圖4.15 UART 應用電路方塊圖……………………………………………67
圖4.16 電腦端串列傳輸應用程式………………………………………..68
圖4.17 MAX II 的FPGA電路板…………………………………………...68
圖4.18 可串列規劃模糊系統電路之架構………………………………..70
圖4.19 可串列規劃模糊系統之電路方塊圖……………………………..71
圖4.20 可串列規劃模糊系統電路產生器………………………………..72
圖4.21 可串列規劃模糊系統電路模組…………………………………..72
圖4.22 SoPC開發實驗板…………………………………………………..74
圖4.23 模糊系統晶片之設計開發流程…………………………………..75
圖4.24 在Nios 與可規劃模糊系統電路方塊圖…………………………...78
圖4.25 在Fuzzy System SoPC應用程式………………………………….78
圖4.26 Nios SDK Shell 程式(a)編譯Nios C 程式，(b)下載機械碼至Nios，
(c)將模糊系統輸出回傳顯示至螢幕上……………………………………79
圖4.27 SoPC開發實驗板驗證圖…………………………………………..79
圖5.1 汽車跟隨防撞系統之方塊圖………………………………………82
圖5.2 紅外線距離感測器…………………………………………………83
圖5.3 汽車跟隨防撞系統所使用之模糊集合(a)輸入變數x 與(b)輸出變數
y……………………………………………………………………………..84
圖5.4 汽車跟隨防撞系統電路方塊圖……………………………………85
圖5.5 模型車之驅動電路板………………………………………………86
圖目錄
VII
圖5.6 (a)模型車之側面圖(b)模型車之正面圖……………………………86
圖5.7 距離感測器之感測情形……………………………………………87
圖5.8 追蹤防撞功能展示圖………………………………………………87
圖5.9 無線遙控之全方位移動系統的方塊圖……………………………88
圖5.10 無線遙控之全方位移動系統的實體圖…………………………..88
圖5.11 全方位移動機器人底座實體圖…………………………………...89
圖5.12 全方位移動機器人底座基本架構圖……………………………..90
圖5.13 機器人相對座標軸示意圖………………………………………..91
圖5.14 機器人絕對座標軸示意圖………………………………………..91
圖5.15 每一代的最佳適應函數值圖(a) 1 號輪, (b) 2 號輪, (c) 3 號輪…..99
圖5.16 兩種情形的模擬結果(a)平移(b)平移與旋轉…………………….99
圖5.17 六個紅外線距離感測器模組……………………………………100
圖5.18 全方位移動機器人機構外觀圖…………………………………100
圖5.19 模糊系統與PWM模組方塊圖…………………………………..101
圖5.20 三輸入三輸出模糊系統與PWM模組之功能模擬圖…………..102
圖5.21 機器人平移的連續圖……………………………………………103
圖5.22 機器人移動旋轉的連續圖………………………………………103
VIII
表目錄
表2.1 模糊系統之規則庫…………………………………………………25
表2.2 倒單擺控制的模糊系統參數………………………………………26
表3.1 模糊系統規則庫……………………………………………………34
表3.2 各模組電路實現到EPF10K20RC240 晶片的使用率……………..38
表3.3 與其他模糊系統硬體電路在FLIPS 與最大操作頻率上的比較….38
表3.4 與FLASP 方法在電路使用資源上的比較………………………...38
表4.1 鮑率選擇表…………………………………………………………54
表4.2 串列傳輸接收器信號說明表………………………………………57
表4.3 databit 控制信號功能表……………………………………………..58
表4.4 paritybit 控制信號功能表…………………………………………...58
表4.5 stopbit 控制信號功能表……………………………………………..58
表4.6 串列傳輸發送器信號說明表………………………………………63
表4.7 UART IP 合成資料表………………………………………………..66
表4.8 模糊知識庫資料協定………………………………………………70
表4.9 UART IP 合成資料表………………………………………………..72
表目錄
IX
表4.10 SoPC設計流程所需使用的軟體一覽表…………………………..75
表5.1 汽車跟隨防撞系統之規則庫………………………………………85
表5.2 1 號輪的模糊規則庫………………………………………………...95
表5.3 2 號輪的模糊規則庫………………………………………………...96
表5.4 3 號輪的模糊規則庫………………………………………………...97
表5.5 搜尋到的模糊系統最佳參數解……………………………………99

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