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系統識別號 U0002-2006200714400400
中文論文名稱 平行板電容的線性度強化結構的探討
英文論文名稱 Studies of linearity enhanced structures of the parallel plate capacitor
校院名稱 淡江大學
系所名稱(中) 電機工程學系碩士班
系所名稱(英) Department of Electrical Engineering
學年度 95
學期 2
出版年 96
研究生中文姓名 薛智瑋
研究生英文姓名 Chih-Wei Hsueh
學號 694350215
學位類別 碩士
語文別 中文
口試日期 2007-06-05
論文頁數 79頁
口試委員 指導教授-李慶烈
委員-丘建青
委員-賴友仁
委員-張道治
委員-林丁丙
中文關鍵字 有限時域差分法  穿透源  電容器  感應器 
英文關鍵字 FDTD  transparent source  capacitor  sensor 
學科別分類 學科別應用科學電機及電子
中文摘要 論文提要內容:
在本論文中,吾人應用時域有限差分法(Finite Difference Time Domain,FDTD)計算幾種平行板電容的靜電容值,對於電容特性的研究常著重於感測器應用的線性度分析,且針對幾種平行板結構的線性度進行研究,包括:簡單平行板電容,只具guard ring型平板電容結構與加細針具guard ring型平板電容結構等。理論部份乃經由驅動方程式建立凖靜電荷的特性來研究平行電容板的結構,由凖靜電荷穩定後的電場值來計算出平行金屬板間的電壓,然後再將電荷總量除以電壓以獲得電容值,並可進一步分析平行板電容的線性度。
一般常用具Guard Ring型平行板電容(有Guard)來增加線性度,因此,本論文分析二種具guard ring型結構的電容與一般簡單平行板電容,以探究線性度,針對具Guard Ring 型平行板電容,吾人可以在上下平行板之間與上下Guard Ring板之間各加一個Source,並調整Source的振幅,使平行板電壓與guard ring板兩者為等電位(虛短路),並與一般簡單平行板電容以及無虛短的具Guard Ring型平行板電容的線性度做比較,結果証實有虛短路的電容結構的線性度比一般電容與無虛短路的具Guard ring型電容來的好。
另外,吾人也發現具guard ring型平板電容與相同金屬板面積的簡單平行板電容的線性度是相同的,可見引進guard ring並不是改善線性度的來源,只是擁有原大面積結構該有的線性度。接著,本研究提出一種插入細針於上、下金屬板的新平板結構,藉由減少外溢電荷以獲得較佳的線性度。當改變平行板的間距以探討線性變異量,模擬結果顯示其線性度依序為(由好至差):1)虛短路加細針的具Guard Ring型電容,2)虛短路的具Guard Ring型電容,3)一般平行板電容,4)無虛短路Guard Ring型電容。
英文摘要 Abstract:
In this thesis, the FDTD method is employed to calculate the static capacitance of several parallel-plate capacitors. The study of the capacitor characteristics is made to emphasize on the linearity analysis for the possible sensor application. The linearity of several parallel-plate structures is examined, which include a simple parallel-plate capacitor, a parallel-plate structure with guard ring only, and a parallel-plate structure with guard ring and pins, etc. Through the use of the transparent current source, the parallel-plates can be charged such that the transient and static E fields are simulated using the FDTD updating equations. The static E field is used to calculate the voltage across the parallel-plates. The capacitance is obtained directly by dividing the charge over the voltage.
In general the parallel plate capacitor with guard ring is used to increase the linearity of sensor capacitors. Thus, in this thesis, two capacitor structures with guard ring and the simple parallel-plate capacitor are studied for the emphasis on the linearity characteristics. A transparent source in between of the upper and lower central plates is utilized, while, another transparent source in between of the guard rings of upper and lower plates are employed at the same time. The amplitudes of these two sources are adjusted in order to achieve equal potential differences, of which the idea is to implement the concept of virtual short, for the two source terminals. The simulated results for the capacitors that are virtually shorted are compared to those of the simple parallel-plate capacitor and/or the capacitors with guard ring (not virtually shorted). The FDTD simulation results confirm that the linearity of the former capacitors with the guard ring, being virtually shorted, is better than that of the simple parallel-plate capacitor and/or the parallel plate capacitor with the guard ring, being not virtually shorted.
On the other hand, it is found that the linearity of a parallel-plate capacitor with guard ring is actually the same as a simple parallel-plate capacitor with the same plate area. Afterwards, a new parallel-plate structure with pins inserted in between the parallel plates is proposed to reduce the linearity deviation as the separation of the parallel plates changes. The simulated results show that the performances of linearity characteristics in decent order are as follows: 1st) capacitors with guard ring and pins, 2nd)capacitors with guard ring (virtually shorted), 3rd) the simple parallel-plate capacitors, 4th) capacitors with guard ring (not virtually shorted).
論文目次 目 錄
第一章 序 論...........................................1
1.1研究動機...............................................1
1.2 論文大綱..............................................3
第二章 有限時域差分法...................................4
2.1 簡介..................................................4
2.2 馬克斯威爾方程式......................................4
2.3 Yee單胞的解析方法.....................................6
2.4 FDTD的演算法..........................................8
2.5 單胞的尺寸大小和Courant穩定準則......................12
2.6 吸收邊界條件.........................................13
2.7 激發源(exciting source)..............................14
第三章 電容感測器線性度分析(無虛短路)..................16
3.1 簡介.................................................16
3.2 電容結構設定.........................................17
3.3 電容線性度比較.......................................21
3.3.1沒有guard ring的平板電容線性度分析..................21
3.3.2沒有guard ring的平板電容的電場分佈..................27
3.3.3具guard ring型平板電容線性度分析....................30
3.3.4具guard ring型平板電容的電場分佈....................35
第四章 電容感測器線性度分析(虛短路)....................41
4.1簡介..................................................41
4.2電容線性度比較........................................41
4.2.1 以Two source激發具guard ring型平板電容
線性度分析...............................................41
4.2.2 以Two source激發具guard ring型平板電容
的電場分佈...............................................52
4.2.3 以Two source激發具細針guard ring型平板電容
線性度分析...............................................56
4.2.4 以Two source激發具細針guard ring型平板電容
的電場分佈...............................................68
第五章 結論與展望........................................77
參考文獻.................................................78

圖 目 錄

圖2.1 FDTD的Yee單胞......................................6
圖2.2 電磁場的時間分配圖.................................7
圖2.3 分析的空間.........................................7
圖2.4 一次差分...........................................9
圖3.1 Structure 1的平行電容板模擬結構圖…...............19
圖3.2 電流源的電流I與金屬板上累積的電荷Q隨時間t
的變化圖................................................ 21
圖3.3 Structure 2的平板電容結構(εr=1δ 、L1=70δ 、L2=50δ
,且 d=3δ)...............................................23
圖3.4 Structure 3的平板電容結構(εr=1δ 、L1=70δ 、L2=50δ
,且 d=3δ)...............................................24
圖3.5 三種不同結構的側視圖..............................24
圖3.6 三種不同結構的電容值倒數隨距離d的變化.............25
圖3.7 線性變異量的圖示說明..............................26
圖3.8 三種不同結構方法線性變異量計算值..................27
圖3.9 三種不同結構的簡單平板電容金屬板上的面電荷
密度大小分佈絕對值(由內到外).............................28
圖3.10 三種不同結構計算的電荷外溢值.....................30
圖3.11 Structure 4的平板電容結構(εr=1δ 、L1=70δ 、L2=50δ
、gap=1δ ,且d=3δ )......................................31
圖3.12 Structure 5的平板電容結構(εr=1δ 、L1=70δ 、L2=50δ
、gap=1δ ,且d=3δ )......................................32
圖3.13 三種不同結構的側視圖.............................33
圖3.14 三種不同結構的電容值倒數隨距離d的變化............34
圖3.15 三種不同結構方法線性變異量計算值.................35
圖3.16 具guard ring型的兩種平板電容及簡單平板電容的
上金屬板面電荷密度大小分佈絕對值(由內到外)...... ........36
圖3.17 三種不同結構計算的電荷外溢值.....................38
圖3.18 上板金屬上的電場 ,沿著(y, z)=(50, 3)............39
圖3.19 上板金屬上的電場 ,沿著(y, z)=(50, 4)............39
圖3.20 上板金屬上的電場 ,沿著(y, z)=(50, 3)............40
圖3.21 Structure 4(With Guard)電容電荷分佈示意圖
,其中I為負值............................................40
圖4.1 Structure 6的平板電容結構(εr=1δ 、L1=70δ 、L2=50δ、gap=1δ ,且d=3δ )....................................42
圖4.2 具guard ring型平板電容連接OP放大器概念圖.........43
圖4.3 Structure 7的平板電容結構(εr=1δ 、L1=70δ 、L2=50δ、gap=1δ ,且d=3δ )....................................44
圖4.4 Structure 7平板電容上的細針排列方式..............45
圖4.5 三種不同結構的側視圖.............................46
圖4.6 圖4.5的三種不同結構的電容值倒數隨距離d的變化.....47
圖4.7 圖4.5三種不同結構線性變異量計算值................48
圖4.8 三種不同結構的側視圖.............................48
圖4.9 圖4.8的三種不同結構的電容值倒數隨距離d的變化.....49
圖4.10 圖4.8三種不同結構線性變異量計算值................50
圖4.11 三種不同結構的側視圖.............................50
圖4.12 圖4.11的三種不同結構的電容值倒數隨距離d的變化....51
圖4.13 圖4.11三種不同結構線性變異量計算值...............52
圖4.14 沿著P1 P2 P3三點連線上的面電荷密度 的路徑變化
示意圖...................................................53
圖4.15 Two source guard ring的兩種平板電容及簡單平板電
容上金屬板的面電荷密度大小分佈絕對值(由內到外)...........54
圖4.16 三種不同結構計算的電荷外溢值.....................55
圖4.17 Structure 8的平板電容結構(εr=1δ 、L1=70δ 、L2=50δ、gap=1δ、d=5δ,且細針長=1δ )..........................57
圖4.18 三種不同結構的側視圖.............................58
圖4.19 Structure 9的平板電容結構(εr=1δ 、L1=70δ 、L2=50δ、gap=1δ、d=4δ,且細針長=1δ)...........................58
圖4.20 三種不同結構的側視圖.............................59
圖4.21 Structure 10的平板電容結構(εr=1δ 、L1=70δ 、L2=50δ、gap=1δ、d=4δ,且細針長=1δ)...........................59
圖4.22 三種不同結構的側視圖.............................60
圖4.23 三種不同結構計算的電容值倒數隨距離d的變化........62
圖4.24 三種不同結構方法線性變異量計算值.................63
圖4.25 三種不同結構計算的電容值倒數隨距離d的變化........64
圖4.26 三種不同結構方法線性變異量計算值.................65
圖4.27 三種不同結構計算的電容值倒數隨距離d的變化........66
圖4.28 三種不同結構方法線性變異量計算值.................67
圖4.29 五種不同結構的振幅大小比較圖.....................68
圖4.30 沿著P1 P2 P3 三點連線上的面電荷密度 的路徑變化
示意圖................................................. 69
圖4.31 三種不同結構的平板電容上金屬板中間方形板的面電荷
密度大小分佈絕對值(由內到外..............................70
圖4.32 沿著P1 P2 P3 三點連線上的面電荷密度 的路徑變化
示意圖...................................................71
圖4.33 三種不同結構的平板電容上金屬板Guard Ring板左邊的
面電荷密度大小分佈絕對值(由內到外).......................71
圖4.34 沿著P1 P2 P3 三點連線上的面電荷密度 的路徑變化
示意圖...................................................72
圖4.35 三種不同結構的平板電容上金屬板Guard Ring板右邊的
面電荷密度大小分佈絕對值(由內到外).......................73
圖4.36 三種不同結構計算的電荷外溢值.....................74
圖4.37 三種不同結構計算的電荷外溢值.....................75
圖4.38 三種不同結構計算的電荷外溢值.....................76

表 目 錄

表3.1 三種不同平板電容結構的計算電場值..................29
表3.2 三種不同平板電容結構的計算電場值..................37
表4.1 Structure 6平板電容的振幅與電位值.................43
表4.2 Structure 7平板電容的振幅與電位值.................45
表4.3 三種不同平板電容結構的計算電場值..................54
表4.4 Structure 8平板電容的振幅與電位值.................61
表4.5 Structure 9平板電容的振幅與電位值.................61
表4.6 Structure 10平板電容的振幅與電位值................62
表4.7 三種不同平板電容結構的計算電荷密度值..............70
表4.8 三種不同平板電容結構的計算電荷密度值..............72
表4.9 三種不同平板電容結構的計算電荷密度值.............73

參考文獻 參考文獻

[1] K. S. Yee,“Numerical solution of initial boundary value problems involving Maxwell’s equation in isotropic media,”IEEE Trans. Antenna and Propagat., vol.14, No.3, pp300-307, May 1966.

[2] A. Taflove, Computational Electrodynamics: The Finite Difference Time-Domain Method. Boston, MA: Artech House, 1995.

[3] J.-P.Bérenger, “A perfectly matched layer for free-space simulation in finite-difference computer codes,” Annales des Télécomm., vol. 51, no. 1–2, pp. 39-46, 1996.

[4] Larry K.Baxter, “Capacitives Sensors Design and Applications, ”The Institute of Electrical and Electronics Engineers,Inc. New York

[5] Ching Lieh Li, Chien Wei Liu, and Shao Hon Chen, “Optimization of a PML Absorber’s Conductivity Profile using FDTD ”, Microwave and Optical Technology Lett., vol.37, pp. 380-383, June 2003.

[6] Ching-Lieh Li, Chien-Wei Lin, and Ding-kai Lin, “ Application of the FDTD method to the Capacitor Structure for Static Field Demonsation and Capacitance Calculation”. Symposium on Technology Fusion of Optoelectronics and Communications, pp. 80-81 May 2005,

[7] R. Pontalti, J. Nadobny, P. Wust, A. Vaccari, and D. Sullivan, “Investigation of Static and Quasi-Static Fields Inherent to the Pulsed FDTD Method,” IEEE Trans. on Microwave Theory Tech., vol. 50, pp. 2022-2025, Aug. 2002.

[8] C.M. Furse, D.H. Roper, D.N. Buechler, D.A. Christensen, and C.H. Durney, “The problem and treatment of DC offset in FDTD simulations”, IEEE Trans. Antennas Propagat., vol.48, pp. 1198-1201, Aug. 2000.

[9] J. B. Schneider, C. L. Wagner, and O. M. Ramahi, “Implementation of Transparent Sources in FDTD Simulations,” IEEE Trans. On Antennas Propagat., vol. 46, pp. 1159-1168, Aug. 1998

[10] Ching-Lieh Li, Ming-Chung Liu and Shao-Hon Chen, “On the Optimization of the Conductivity Profile for the PML Absorber for the FDTD Code”, Microwave and Optical Technology Letters, vol.37 no.5,pages 69-73 , Jun. 5, 2003.

[11] C.L. Wagner, and J.B. Schneider, “Divergent fields, charge, and capacitance in FDTD simulations”, IEEE Trans. Microwave Theory Tech., vol 46, pp. 2131-2136, Dec. 1998

[12] Štefan Lányi, “Analysis of linearity errors of inverse capacitance position sensord, ”Meas.Sci. Tehnol.9 No 10(October1998) pp. 1757-1764.

[13] Ding-kai Lin, “Linearity analysis of a parallel plate capacitor via the FDTD method”.

[14] M.M.A. Salama, M.M. Elsherbiny and Y.L. Chow, “Calculations and interpretation of resistance of grounding grid in two-layer earth with the synthetic-asymptote approach”, Electric Power System Research, Vol.35, pp. 157-165, 1995.

[15] P. M. Harrey, P. S. A. Evans, D. J. Harrison, “Integrated Capacitors for Conductive Lithographic Film Circuits,” IEEE trans on electronics packaging manufacturing, vol. 24, no. 4, October 2001.
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