早期的科技產品結構簡單且耐用度較差，因此在給定的試驗時間內，大部分皆能觀測到受測樣本的失效資料；然而，隨著技術水準提升，現今的科技產品耐久化、複雜化，且具有高可靠度的特性，欲在給定的試驗時間內，觀測到所有受測樣本的失效資料進行產品允收，就顯得困難重重。此時，可選取一與產品壽命有關的品質特徵值 (quality characteristic, QC)，且此品質特徵值具有隨測試時間衰變的性質，並將受測樣品置於高應力的環境之下，以加速測試樣本衰變，再藉由不同應力與壽命之間的關係式，來對產品進行檢驗，此即為加速應力允收試驗 (accelerated-stress acceptance test)。
林琮庭 (2013) 藉由此晶片電阻器衰變資料建構一衰變模型，並以單一加速應力來估計最佳允收時間及其漸近變異數，進而求得加速應力允收試驗之最佳試驗配置。然而，若想得知其他應力之下的最佳允收時間與其漸近變異數及最佳加速試驗配置，勢必得依照林琮庭 (2013) 所提之方法重新操作與估計參數。此時，若能將應力與模型參數之間的關係式建立起來，則能直接使用內插和外推法得到該批晶片電阻器在各應力下之最佳允收時間。最後，本文探討在試驗總成本不超過事先給定的預算下，極小化最佳應力允收時間估計值之漸近變異數，以求得最佳試驗配置。

In the early stages, technology products had simple structure and poor durability, so the time-to-failure data could be recorded from the tested samples within a given testing time; however, with the improvement of technology, the products are nowadays highly reliable. That is difficult to collect time-to-failure data. In this situation, a quality characteristic related to the product’s lifetime, which has the property of decaying with the testing time, can be used to conduct an acceptance test. Tested samples are placed under a high stress to accelerate its decay, and then the product is inspected by the relationship between different stresses and lifetimes. This is called the accelerated- stress acceptance test.
Lin (2013) constructed a degradation model of chip resistors data, and estimated the optimal acceptance testing time and its asymptotic variance with a single accelerated stress. In this study, the degradation model with multiple accelerated stresses is proposed. At this time, the interpolation and extrapolation methods can be used directly to obtain the optimal acceptance testing time of the batch of resistors under various stresses. In addition, the optimal design is discussed by minimizing the asymptotic variance of the estimated value of the optimal acceptance testing time under the budget constraint.

目 錄

第一章 緒論 1
第一節 前言 1
第二節 文獻回顧 3
第三節 研究動機與目的 5
第四節 研究架構 10

第二章 衰變模型建構 11

第三章 最佳加速應力允收試驗 14
第一節 最佳加速應力允收試驗時間 14
第二節 最佳允收時間之漸近變異數 16
第三節 最佳化模型 18

第四章 實例分析 20
第一節 研究動機例子回顧 20
第二節 最佳試驗配置 23
第三節 模擬分析 26

第五章 結論及後續研究 27

附錄A  定理一之證明 28
附錄B  ▽t*之推導 31
附錄C  費雪訊息矩陣之推導 34
附錄D  允收機率之推導 37
參考文獻 38

圖 目 錄

圖1.3.1：溫度S0下，電阻器電阻值之相對變化率 6
圖1.3.2：溫度S1下，電阻器電阻值之相對變化率 6
圖1.3.3：溫度S2下，電阻器電阻值之相對變化率 7
圖1.3.4：溫度S之下，最佳加速應力允收試驗時間示意圖 8
圖2.1：估計值αk、βk、σk與應力Sk，k=0,1,2之關係圖 12
圖4.1.1：不同應力S下之最佳加速應力允收時間 21

表 目 錄

表2.1：參數αk、βk、σk與應力Sk之線性關係評估 13
表4.2.1：在不同預算Cb下，加速應力允收試驗之最佳試驗配置 23
表4.2.2：不同成本條件(Cop,Cmea,Cit)下，加速應力允收試
         驗之最佳試驗配置 25
表4.3：t*之模擬值與真實值比較 26

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