系統識別號 | U0002-1607201417040200 |
---|---|
DOI | 10.6846/TKU.2014.00580 |
論文名稱(中文) | 利用選擇性電鍍法製備銅凸塊於矽基板之研究 |
論文名稱(英文) | The Study of the Selective Electroplating of Cu Bumps on Si Substrate |
第三語言論文名稱 | |
校院名稱 | 淡江大學 |
系所名稱(中文) | 化學工程與材料工程學系碩士班 |
系所名稱(英文) | Department of Chemical and Materials Engineering |
外國學位學校名稱 | |
外國學位學院名稱 | |
外國學位研究所名稱 | |
學年度 | 102 |
學期 | 2 |
出版年 | 103 |
研究生(中文) | 陳洛嶙 |
研究生(英文) | Lo-Lin Chen |
學號 | 601400590 |
學位類別 | 碩士 |
語言別 | 繁體中文 |
第二語言別 | |
口試日期 | 2014-06-19 |
論文頁數 | 76頁 |
口試委員 |
指導教授
-
許世杰
委員 - 吳宛玉 委員 - 林正嵐 |
關鍵字(中) |
選擇性電鍍 銅凸塊 電流密度 半導體 |
關鍵字(英) |
selective electroplating Cu bump current density semiconductor |
第三語言關鍵字 | |
學科別分類 | |
中文摘要 |
本論文旨在開發選擇性電鍍的製程技術,此技術能夠不需要任何阻擋層,而達到在半導體基板預先晶粒定義的位置上電鍍銅凸塊的目的。 研究中,使用定電流密度之方法,可以成功地製作出不需阻擋層的圖形化電鍍銅凸塊,而達到選擇性電鍍的效果。以表面輪廓儀測量電鍍銅凸塊的輪廓,可觀察到電鍍銅凸塊的平均厚度會隨著電流密度增加而降低,而電鍍銅凸塊的邊緣會隨著電流密度增加有明顯的突起。進一步地研究發現,電流密度為45 mA/cm2時為形貌轉換過渡期,此時銅凸塊部分邊緣有稍微突起之現象;電流密度為45 mA/cm2以下時,銅凸塊形貌為蘑菇頭狀;而當電流密度為45 mA/cm2以上時,銅凸塊邊緣則明顯突起。這個現象將藉由邊緣效應及電荷聚集效應的機制作一深入之探討。此外,本研究也定義了相似度來判定銅凸塊的形貌狀況,從實驗結果中可以得知當電流密度為50 mA/cm2時,電鍍銅凸塊基板有最適化的表面形貌。 除了定電流密度之外,本研究還完成了定電位、脈衝電流的測試實驗,由於僅為初期之實驗結果,故放入附錄中以供參考。 |
英文摘要 |
The purpose of the study is developing the selective electroplating technique. For the manufacture of semiconductor, we can successfully fabricate the copper bumps on the pre-defined pattern seed layer without using barriers by the selective electroplating technique. In the study, we can successfully fabricate the copper bumps by using galvanostatic methods. The contours of the copper bumps were measured by the Alpha-step profilometer. The thickness of the copper bumps decreases with increasing current density. In further investigations, it is found that the copper bumps with obtuse edges obtained if the electroplating current density is lower than 45 mA/cm2. At the current density of 45 mA/cm2, a portion of the edge of the copper bumps was slightly protruded as the transition stage. The edge of the copper bumps was obviously protruded when deposited using current density higher than 45 mA/cm2. It further discusses with edge effect and charge aggregation effect. In addition, the morphology and the similarity of the copper bumps at 50 mA/cm2 are the best from the results. |
第三語言摘要 | |
論文目次 |
致謝 I 摘要 II 目錄 V 圖目錄 VIII 表目錄 XII 第一章 緒論 1 1-1 前言 1 1-2 研究動機與目的 3 第二章 理論基礎 5 2-1銅金屬沉積方式 5 2-1.1化學氣相沉積法(CVD) 7 2-1.2物理氣相沉積法(PVD) 7 2-1.3無電鍍法(Eectroless Deposition) 8 2-1.4電鍍法(EPD) 9 2-2電鍍反應沉積機制 11 2-2.1電鍍機制 11 2-2.2直流與脈衝電鍍 14 2-2.3薄膜成長機制 15 第三章 實驗方法與步驟 18 3-1 實驗材料 18 3-2 實驗裝置與原理 21 3-2.1 光阻塗佈機 21 3-2.2 雙面光罩對準曝光機 22 3-2.3 電子槍及熱蒸鍍系統 23 3-2.4 電化學分析儀 24 3-3 分析儀器與原理 25 3-3.1 掃瞄式電子顯微鏡 25 3-3.2探針式表面分析儀 26 3-4 實驗步驟 27 第四章 實驗結果與討論 33 4-1 不同電流密度下電鍍銅凸塊表面形貌分析 33 4-1.1電鍍銅凸塊SEM圖之分析與討論 34 4-1.2電鍍銅凸塊層表面輪廓圖分析 37 4-1.3邊緣效應及電荷累積效應 39 4-2電鍍銅凸塊表面輪廓及相似度分析與討論 46 4-2.1電鍍銅凸塊表面輪廓之分析 46 4-2.2電鍍銅凸塊相似度之分析與討論 48 4-3電鍍銅凸塊水平與垂直成長比較分析 58 第五章 結論 65 第六章 參考文獻 67 附錄A 71 附錄B 72 附錄C 74 圖2-1 CVD製程流程示意圖 6 圖2-2 Cu(hfac)2化學結構圖 6 圖2-3濺鍍製程示意圖 8 圖2-4金屬離子沉積於晶體表面之起始及最終狀態圖 12 圖2-5金屬離子沉積之臺階邊緣離子轉移機制圖(1)直接轉移至扭折位置;(2)沿著臺階邊緣擴散至扭折位置 13 圖2-6金屬離子沉積之表面離子轉移機制圖 14 圖2-7 (1)直流以及(2)脈衝電流的波形示意圖 14 圖2-8 薄膜成長機制:(1)成核,(2)晶粒成長,(3)晶粒聚集,(4)縫道填補,(5)連續薄膜成長 17 圖3-1光阻塗佈機 21 圖3-2雙面光罩對準曝光機 22 圖3-3電子槍及熱蒸鍍系統 23 圖3-4 電子槍蒸鍍示意圖 24 圖3-5 電化學分析儀 25 圖3-6 掃瞄式電子顯微鏡 26 圖3-7 探針式表面分析儀 27 圖3-8工作電極示意圖 29 圖3-9 實驗流程示意圖 30 圖3-10 實驗裝置示意圖 31 圖4-1不同電流密度下之SEM圖。(a) 20 mA/cm2,(b) 40 mA/cm2,(c) 60 mA/cm2,(d) 80 mA/cm2,(e) 100 mA/cm2,(f) 160 mA/cm2 35 圖4-2表面輪廓掃描方向示意圖 37 圖4-3不同電流密度下之表面輪廓分析圖。(a) 20 mA/cm2,(b) 40 mA/cm2,(c) 60 mA/cm2,(d) 80 mA/cm2,(e) 100 mA/cm2,(f) 160 mA/cm2 38 圖4-4 邊緣效應示意圖 40 圖4-5導體不同曲率半徑面電荷密度示意圖 41 圖4-6同一導體電荷密度分佈示意圖 41 圖4-7電流密度160 mA/cm2之表面輪廓及SEM結果比較圖 43 圖4-8不同電流密度下之表面輪廓比較圖 47 圖4-9電流密度為45、50、55 mA/cm2下之表面輪廓比較圖 48 圖4-10最適銅凸塊形貌之示意圖 49 圖4-11不同電流密度下之相似度比較圖 50 圖4-12不同電流密度下之相似度比較圖。(a) 20 mA/cm2,(b) 40 mA/cm2,(c) 45 mA/cm2,(d) 50 mA/cm2,(e) 55 mA/cm2,(f) 60 mA/cm2,(g) 80 mA/cm2,(h) 100 mA/cm2 53 圖4-13不同電流密度下之超出平均高度銅凸塊面積比率圖 56 圖4-14電流密度50 mA/cm2下之輪廓掃描示意圖 57 圖4-15電流密度50 mA/cm2下之厚度分佈圖 57 圖4-16不同電流密度下之銅凸塊側向面積比率圖 59 圖4-17不同電流密度下之側向成長圖 60 圖4-18不同電流密度下之側向成長速率圖 61 圖4-19不同電流密度下之沉積厚度圖 62 圖4-20不同電流密度下之沉積速率圖 63 圖4-21正向沉積與側向成長速率比圖 64 圖A-1圖案化基板線性掃描分析圖 71 圖B-1定電位-0.7 V、2400s之SEM圖。(a)電鍍前,(b)、(c)上視圖,(d)、(e)截面圖 73 圖C-1脈衝電位之SEM圖(Von : Voff = - 0.8V : 0V、ton : toff = 0.5s : 0.5s)。(a)電鍍前,(b)、(c)上視圖,(d) tile 45 圖 74 圖C-2不同電鍍模式下銅凸塊間走道之SEM圖。(a)為定電位、(b)為脈衝電位 76 表3-1 實驗參數表 32 表4-1沉積銅原子數與消耗電子數比較表 45 |
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