在過去幾十年，石英振盪器在大多數電子產品被廣泛用作參考時脈產生器，因為它們可以提供穩定的操作時脈來與各種應用系統晶片（SoC）的電路。值得注意的是，一個石英振盪器不僅在正常的環境下提供了一個穩定的運行時脈，重點是當晶片處在操作環境的變異下，石英振盪器仍可以提供一個精準與穩定的輸出，這是石英振盪器的主要優勢。通常集成在SoC的電路需要不同操作頻率的時脈，但這些時脈卻需要由不同的振盪器產生。因此，提供一個廣泛頻道使用的時脈產生器設計已於近日成為無晶體時脈產生器中一個突出的設計考量。
    本文提出了一種新的控制機制來產生較寬的輸出頻率範圍，而此機制僅需要一對25MHz差動輸入訊號的責任週期變異。當這些責任週期由數位控制脈衝寬度調變設置後，送入責任週期電壓轉換器，由呈現反比成長的責任週期控制係數產生雙控制電壓VP和VN，分別管理電壓控制振盪器的延遲以提供一個寬頻輸出範圍的頻率。本文所提出的時脈產生器可以提供一個穩定35MHz至138MHz的頻率輸出時脈，並以較小的供應電壓以及面積，提供給寬頻需求的應用做為使用。

In previous decades, quartz oscillators were widely used as reference clock generators in most electronic products, because they can supply a stable operating clock to system-on-a-chip (SoC) circuits with various applications. Notably, a quartz oscillator not only supplies a stable operating clock in normal situation, but can also provide accuracy and stability against the environment variations, which is the main advantage of quartz oscillator. 
     Circuits integrated on a SoC usually require diverse operating frequencies, which are generated by various clock generators. Therefore, supplying a wide range of frequency channels has recently become a prominent design consideration for crystal-less clock generators. 
     This paper presents a new control mechanism to generate wide range frequencies, which requires only the duty cycle variation of the differential 25-MHz input signals. When these duty cycles are set by digitally controlled pulse width modulation and fed into the duty-cycle-to-voltage converter, dual control voltages, namely VP and VN with positive and negative control duty cycle coefficients, respectively, are produced to manage the delay of the voltage-controlled ring oscillator and supply a wide range of frequency channels. The proposed clock generator can supply a stable output clock with a wide range of frequencies from 35MHz to 138MHz, and can be used in wideband applications with low supply voltages and small areas.

誌謝 ...................................................................................................I
論文摘要 ......................................................................................... II
Abstract ........................................................................................... III
目錄 ................................................................................................ IV
圖目錄 .......................................................................................... VII
表目錄 .......................................................................................... XII
第一章 緒論 .................................................................................... 1
1.1 研究背景與動機 ................................................................................ 1
1.2 設計流程 ............................................................................................ 2
1.3 論文架構 ............................................................................................ 4
第二章 具製程與溫度變異補償機制之可調式寬頻輸出時脈產
生電路文獻與分析........................................................................... 5
2.1 製程與溫度變異分析 ........................................................................ 5
2.1.1 製程變異分析 ......................................................................... 6
2.1.2 溫度變異分析 ......................................................................... 7
2.2 振盪器概論 ........................................................................................ 8
2.2.1 單端環形振盪器 ..................................................................... 9
2.2.2 雙端差動環形振盪器 ........................................................... 10
V
2.3 文獻分析與探討 .............................................................................. 13
2.3.1 脈衝寬度調變 ....................................................................... 14
2.3.2 頻率電壓轉換器 ................................................................... 16
2.3.3 電壓控制單端環形振盪器 ................................................... 17
2.3.4 文獻分析結論 ....................................................................... 18
第三章 具製程與溫度變異補償機制之可調式寬頻輸出時脈產
生電路設計 .................................................................................... 19
3.1 數位控制脈衝寬度調變 .................................................................. 20
3.2 寬頻參考時脈產生電路 .................................................................. 23
3.2.1 責任週期電壓轉換器 ........................................................... 23
3.2.2 電壓控制環形振盪器 ........................................................... 26
第四章 驗證電路之架構、目的與量測 ....................................... 27
4.1 0.9V、25MHz 脈波控制之寬頻時脈產生器 ................................. 27
4.1.1 電路佈局 ............................................................................... 28
4.1.2 量測考量與結果 ................................................................... 30
4.2 可調式寬頻輸出時脈產生器 .......................................................... 34
4.2.1 電路佈局 ............................................................................... 35
4.2.2 量測考量與結果 ................................................................... 37
4.3 具製程變異補償機制之可調式寬頻輸出時脈產生器 ................. 41
4.3.1 電路佈局 ............................................................................... 42
4.3.2 量測考量與結果 ................................................................... 44
VI
第五章 全系統之電路佈局、模擬、量測考量與結果 ............... 48
5.1 具製程與溫度變異補償機制之可調式寬頻輸出時脈產生電路 . 50
5.2 全系統之電路佈局 .......................................................................... 51
5.3 全系統之電路模擬 .......................................................................... 54
5.4 全系統之量測考量與結果 .............................................................. 65
第六章 結論與未來展望 ............................................................... 79
參考文獻 ........................................................................................ 80
VII
圖目錄
圖 1.1 振盪器的應用 ....................................................................................... 1
圖 1.2 晶片設計流程圖 .................................................................................. 3
圖 2.1 電路受製程與溫度變異影響示意圖 .................................................. 6
圖 2.2 振盪器回授模型 .................................................................................. 8
圖 2.3 傳統三級單端環形振盪器 .................................................................. 9
圖 2.4 傳統三級單端環形振盪器理想時序圖 ............................................ 10
圖 2.5 雙端差動延遲單位 ............................................................................ 11
圖 2.6 四級雙端差動環型振盪器 ................................................................ 11
圖 2.7 四級雙端差動環型振盪器之操作時序圖 ........................................ 12
圖 2.8 數位控制脈衝寬度調變架構圖 ........................................................ 14
圖 2.9 數位控制脈衝寬度調變之操作時序圖 ............................................ 15
圖 2.10 頻率電壓轉換器 .............................................................................. 16
圖 2.11 頻率電壓轉換器之操作時序圖 ...................................................... 16
圖 2.12 傳統三級電壓控制單端環形振盪器 .............................................. 17
圖 3.1 具製程與溫度變異補償機制之可調式寬頻輸出時脈產生電路 ... 19
圖 3.2 數位控制脈衝寬度調變架構圖 ........................................................ 20
圖 3.3 數位控制脈衝寬度調變之操作時序圖 ............................................ 20
圖 3.4 具製程補償之電流源Header 的電路架構 ...................................... 21
圖 3.5 具製程補償之電流源Tailer 的電路架構 ........................................ 21
圖 3.6 製程補償8 bit 數位控制溫度碼之數位控制訊號處理單元 .......... 22
圖 3.7 責任週期電壓轉換器 ........................................................................ 23
VIII
圖 3.8 具製程與溫度補償之延遲單元 ........................................................ 24
圖 3.9 當輸入責任週期D1：D2 = 50：50 時DCVC 之操作時序圖 ........ 24
圖 3.10 當輸入責任週期D1：D2 = 20：80 時DCVC 之操作時序圖 ...... 25
圖 3.11 當輸入責任週期D1：D2 = 80：20 時DCVC 之操作時序圖 ...... 25
圖 3.12 具製程與溫度補償之電壓控制環形振盪器 .................................. 26
圖 4.1 0.9V、25MHz 脈波控制之寬頻時脈產生電路架構圖 ................... 27
圖 4.2 電路佈局圖 ........................................................................................ 28
圖 4.3 晶片微影圖 ........................................................................................ 29
圖 4.4 電路佈局示意圖 ................................................................................ 29
圖 4.5 量測環境示意圖 ................................................................................ 30
圖 4.6 經過18 Pin 封裝後量測之PCB 板 .................................................. 31
圖 4.7 責任週期電壓轉換器雙端之輸出電壓 ............................................ 32
圖 4.8 雙端電壓控制環形振盪器之輸出頻率 ............................................ 32
圖 4.9 量測結果波型圖 ................................................................................ 33
圖 4.10 可調式寬頻輸出時脈產生電路架構圖 .......................................... 34
圖 4.11 電路佈局圖 ...................................................................................... 35
圖 4.12 晶片微影圖 ...................................................................................... 36
圖 4.13 電路佈局示意圖 .............................................................................. 36
圖 4.14 量測環境示意圖 .............................................................................. 37
圖 4.15 經過24 Pin 封裝後量測之PCB 板 ................................................ 38
圖 4.16 責任週期電壓轉換器雙端之輸出電壓 .......................................... 39
圖 4.17 雙端電壓控制環形振盪器之輸出頻率 .......................................... 39
IX
圖 4.18 量測結果波型圖 .............................................................................. 40
圖 4.19 具製程變異補償機制之可調式寬頻輸出時脈產生電路架構圖 . 41
圖 4.20 電路佈局圖 ...................................................................................... 42
圖 4.21 晶片微影圖 ...................................................................................... 43
圖 4.22 電路佈局示意圖 .............................................................................. 43
圖 4.23 量測環境示意圖 .............................................................................. 44
圖 4.24 經過24 Pin 封裝後量測之PCB 板 ................................................ 45
圖 4.25 責任週期電壓轉換器雙端之輸出電壓 .......................................... 46
圖 4.26 雙端電壓控制環形振盪器之輸出頻率 .......................................... 46
圖 4.27 量測結果波型圖 .............................................................................. 47
圖 5.1 全系統之電路架構圖 ........................................................................ 50
圖 5.2 全系統之電路佈局圖 ........................................................................ 51
圖 5.3 全系統之晶片微影圖 ........................................................................ 52
圖 5.4 全系統之電路佈局示意圖 ................................................................ 53
圖 5.5 溫度與製程變異對輸出頻率之關係圖 ............................................ 54
圖 5.6 在SS 製程0℃下各子電路之輸出模擬結果 .................................. 55
圖 5.7 在SS 製程27℃下各子電路之輸出模擬結果 ................................ 55
圖 5.8 在SS 製程75℃下各子電路之輸出模擬結果 ................................ 56
圖 5.9 在TT 製程0℃下各子電路之輸出模擬結果 .................................. 56
圖 5.10 在TT 製程27℃下各子電路之輸出模擬結果 .............................. 57
圖 5.11 在TT 製程75℃下各子電路之輸出模擬結果 .............................. 57
圖 5.12 在FF 製程0℃下各子電路之輸出模擬結果 ................................ 58
X
圖 5.13 在FF 製程27℃下各子電路之輸出模擬結果 .............................. 58
圖 5.14 在FF 製程75℃下各子電路之輸出模擬結果 .............................. 59
圖 5.15 在27℃下製程變異對應數位控制碼之輸出頻率關係圖 ............ 60
圖 5.16 當數位控制碼為000 時各子電路之輸出模擬結果...................... 61
圖 5.17 當數位控制碼為001 時各子電路之輸出模擬結果...................... 61
圖 5.18 當數位控制碼為010 時各子電路之輸出模擬結果...................... 62
圖 5.19 當數位控制碼為011 時各子電路之輸出模擬結果 ...................... 62
圖 5.20 當數位控制碼為100 時各子電路之輸出模擬結果...................... 63
圖 5.21 當數位控制碼為101 時各子電路之輸出模擬結果...................... 63
圖 5.22 當數位控制碼為110 時各子電路之輸出模擬結果 ...................... 64
圖 5.23 量測環境示意圖 .............................................................................. 65
圖 5.24 本次量測所使用的電源穩壓器與經過晶片打線後之PCB 板 ..... 66
圖 5.25 在27℃下調整數位控制碼對應輸出頻率之關係圖..................... 67
圖 5.26 當數位控制碼為000 時電路之輸出頻率量測結果...................... 68
圖 5.27 當數位控制碼為001 時電路之輸出頻率量測結果...................... 68
圖 5.28 當數位控制碼為010 時電路之輸出頻率量測結果...................... 69
圖 5.29 當數位控制碼為011 時電路之輸出頻率量測結果 ...................... 69
圖 5.30 當數位控制碼為100 時電路之輸出頻率量測結果...................... 70
圖 5.31 當數位控制碼為101 時電路之輸出頻率量測結果...................... 70
圖 5.32 當數位控制碼為110 時電路之輸出頻率量測結果 ...................... 71
圖 5.33 當數位控制碼為011 時溫度變異對輸出頻率之關係圖 .............. 72
圖 5.34 在0℃下量測結果波型圖 ............................................................... 72
XI
圖 5.35 在27℃下量測結果波型圖 ............................................................. 73
圖 5.36 在75℃下量測結果波型圖 ............................................................. 73
圖 5.37 0℃下輸出波型抖動量 ..................................................................... 74
圖 5.38 27℃下輸出波型抖動量 ................................................................... 74
圖 5.39 75℃下輸出波型抖動量 ................................................................... 75
圖 5.40 0℃下之頻譜分析圖 ......................................................................... 75
圖 5.41 27℃下之頻譜分析圖 ....................................................................... 76
圖 5.42 75℃下之頻譜分析圖 ....................................................................... 76
XII
表目錄
表 3.1 8 bit 數位控制溫度碼對應D1、D2、FOUT 之輸出結果對照表 ....... 22
表 4.1 量測結果 ............................................................................................ 33
表 4.2 量測結果 ............................................................................................ 40
表 4.3 量測結果 ............................................................................................ 47
表 5.1 3-to-7 Binary-to-Thermal 腳位對照表 .............................................. 48
表 5.2 PMOS 製程補償控制碼示意表 ......................................................... 49
表 5.3 NMOS 製程補償控制碼示意表 ........................................................ 49
表 5.4 溫度補償控制碼之示意表 ................................................................ 49
表 5.5 全系統之模擬規格表 ........................................................................ 64
表 5.6 全系統之量測結果 ............................................................................ 77
表 5.7 文獻結果比較表 ................................................................................ 78

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