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系統識別號 U0002-1508201210392800
DOI 10.6846/TKU.2012.00607
論文名稱(中文) 深次微米互補式金氧半製程之超低功耗接收器前端電路設計
論文名稱(英文) Design of a Ultra-Low Power Receiver Front-end in a Sub-micro CMOS Process
第三語言論文名稱
校院名稱 淡江大學
系所名稱(中文) 電機工程學系碩士班
系所名稱(英文) Department of Electrical and Computer Engineering
外國學位學校名稱
外國學位學院名稱
外國學位研究所名稱
學年度 100
學期 2
出版年 101
研究生(中文) 張育銓
研究生(英文) Yu-Chuan Chang
學號 699450242
學位類別 碩士
語言別 繁體中文
第二語言別
口試日期 2012-06-27
論文頁數 46頁
口試委員 指導教授 - 施鴻源(hyshih.tw@gmail.com)
委員 - 郭建男(cnkuo@mail.nctu.edu.tw)
委員 - 江正雄(chiang@ee.tku.edu.tw)
關鍵字(中) 超低功耗
弱反轉區
接收器前端
關鍵字(英) Ultra-Low Power
Weak Inversion
Receiver Front-end
第三語言關鍵字
學科別分類
中文摘要
隨著生醫電子應用的快速發展,將晶片穿戴或植入人體用以偵測各種生理訊號或是進行藥物釋放成達到居家照護的目的將成為趨勢。由於此類晶片的電源來源為電池、體熱發電或是無線電能量收集電路,因此在其傳輸介面電路設計上最重要的要求為超低功率消耗,以達到延長使用壽命的目的。由於接收器必須長時間維持開啟狀態,因此接收器的功率消耗佔了整體功率消耗的一半以上,因此實現一超低功耗接收器可大幅延長使用時間。
    在超低功耗電路設計方面,無論類比或數位電路近年來皆利用將電晶體操作在次臨界區達到降低功率消耗的目的。在類比與射頻電路設計上,Christian C. Enz進一步的將次臨界區分為弱反轉區與中反轉區。並由其研究顯示當操作速度小於100MHz時,將電晶體操作在弱反轉區時可以達到超低功率消耗之目的,電晶體亦具有提供20dB本質增益之能力。
    在此我們實現了一個以人體為傳輸介質應用於穿戴式或植入式生理訊號感測器之超低功耗接收器前端電路。由於以人體為傳輸介質,因此傳輸的路徑損耗會比空氣中小許多,大幅降低對接收器前端電路靈敏度之要求。電路中電晶體皆操作在深弱反轉區,在無輸入訊號下,電路之靜態電流消耗僅35.4uA,此時操作電壓為1.8V,亦靜態功率消耗僅68.4uW。當操作在400MHz輸入訊號下,在僅消耗86.4uW下達到24.1dB之電壓增益表現、大於18dB之訊號、三階失真比與大於200KHz之輸出頻寬。
英文摘要
As age advances, the electronic applications in the biomedical develops rapidly. It is the trend that people carry chips or implant chips into their body in order to      detect a variety of physiological signals. Also, they use chips to release medicines to achieve the purpose of home care. As those chip’s power source used for the battery, the power generation of body heat or radio energy harvested circuit, therefore the most important requirements in transmission interface circuit design for ultra-low power consumption to extend the service life of purpose. Since the receiver must remain turn on for a long time, the receiver's power consumption accounted for more than half of the overall power consumption, therefore to achieve an ultra-low power receiver can significantly extend the used time.
  In ultra-low power circuit design, whether analog or digital circuits are using transistors operating in subthreshold  to reduce power consumption  in recent years. In analog and RF circuit design, Christian C. Enz further divided sub-threshold  into the weak inversion and the moderate-inversion. His studies shows that when the operating speed less than 100MHz, people operated the transistor in weak inversion in order to achieve the purpose of the ultra-low power. Transistors also provide 20dB intrinsic gain. 
  We have accomplished an intra-body communication  in wearable or implantable type of physiological signal sensor on ultra-low power receiver front-end circuit. Because transmission medium is human body, the path lose is smaller than in the air. It substantially reduced the requirements on the sensitivity of  receiver front-end. All transistors are operating on deep weak inversion. Without input of the RF signal, the receiver front-end consumes a static current of 35.4 μA under a supply voltage of 1.8 V, also static power consumption is only 68.4 μW. When input signal is 400 MHz, the power consumption is only 86.4 μW, the voltage gain has 24.1 dB, IIP3 has greater than 18 dB, and bandwidth is 200 KHz.
第三語言摘要
論文目次
目錄
中文摘要	I
英文摘要	II
內文目錄	III
圖表目錄	VI

第一章  緒論	1
1.1 研究背景	1
1.2 研究動機	1
1.3 論文架構	2

第二章  電晶體在弱反轉區特性	3
2.1電晶體操作區定義	3
2.2金氧半導體電容之電荷分析	7
2.2.1不考慮汲源極的電荷分析	7
2.2.2考慮汲源極的電荷分析	10
2.3弱反轉與強反轉的表面電位	11
2.3.1 值的定義	11
2.3.2弱反轉與強反轉的表面電位	12
2.3.3考慮基體效應的表面電位	13

2.4電晶體通道電流公式推導	13
2.4.1弱反轉電流公式推導	13
2.4.2強反轉電流公式推導	15
2.5探討與比較	17

第三章  人體內訊號傳輸之傳播特性	19
3.1人體內訊號傳輸之應用	21
3.2觀察以身體為介質的傳輸特性之實驗設置	19
3.3實驗結果與探討	23

第四章  接收器前端之架構與所提出之架構的模擬與電路佈局	25
4.1 接收器前端架構探討	25
4.2 電路設計	30
4.3 電路佈局與模擬	32
4.3.1電路模擬	32
4.3.2電路佈局	35

第五章  晶片量測	37
5.1 量測方式	37
5.2 量測結果	39
第六章  結論	43

參考文獻	44

































圖目錄

圖2.1(a)理論上ID-VDS特性曲線(b)模擬所得ID-VDS特性曲線	4
圖2.2電晶體之ID-VGS特性曲線(a)在弱反轉成指數關係(b)在強反轉成平方根  
      關係	4
圖2.3直觀的金氧半導體電晶體模型	6
圖2.4金氧半導體電容之電荷分佈	7
圖2.5汲極源的金氧半導體電容之分佈	10
圖3.1應用於盲人的IBC系統裝置	20
圖3.2量測系統示意圖	20
圖3.3量測方式(a)站立測試(b)坐下測試	23
圖4.1使用類比混頻器與延遲電路達到解調目的之架構圖(擷錄自參考文獻
[14])	26
圖4.2DLL/PLL-based解調法之架構圖(擷錄自參考文獻[15])	27
圖4.3使用數位電路進行解調之示意圖(擷錄自參考文獻[16])	27
圖4.4 使用注入鎖定除頻器技術達成頻率轉振幅之目的以進行解調(擷錄自參考文獻[17])	28
圖4.5使用注入鎖定技術達成頻率轉相位之目的進行解調(擷錄自參考文獻
[18])	28
圖4.6深次微米互補式金氧半製程之超低功耗接收器前端電路設計	31
圖4.7輸入功率與增益變化之模擬結果	33
圖4.8輸入1dB壓縮點之模擬結果	34
圖4.9輸入三階交越點之模擬結果	34
圖4.10電路佈局	36
圖5.1輸入訊號匹配之量測示意圖	37
圖5.2輸入1dB壓縮點之量測示意圖	38
圖5.3輸入三階交越點之量測示意圖	38
圖5.4晶片微影照相	39
圖5.5PCB照相	40
圖5.6電路之電流消耗	40
圖5.7輸入功率對增益與電流消耗之量測結果	41
圖5.8輸入1dB壓縮點與輸入三階交越點之量測	42






























表目錄

表2.1次臨限與超臨限之比較	6
表2.2弱反轉與強反轉的通道電流之比較	18
表3.1主要量測參數	21
表4.1超低功耗接收器效能比較表	30
表4.2預計規格表	32
表4.3輸出規格表	35
表5.1量測結果	42
參考文獻
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