超大型積體電路（VLSI）技術的推進，壓縮技術使得單個晶片中存在數十億個邏輯閘。VLSI技術的快速發展給設計和測試工程師帶來了新的困難，在這些困難中，大型測試的功耗是重要的問題之一。
    本文介紹了一種掃描架構，通過修改測試應用程序中的測試樣本，實現了高質量和低功耗測試。當測試樣本在每個移位中切換大量的掃描正反器，會降低電路的穩定性，造成故障驗證困難，產品良率下降和壽命縮短等，是個嚴重的問題。論文架構中解決了部分的位移功率，使用一個方法來降低掃描正反器切換次數，減少由測試樣本移入而引起的切換活動，該方法在掃描移入操作期間計算掃描正反器的切換活動，選擇合適的掃描路徑以移入測試樣本。

This paper presents a scan architecture. that achieves high quality and low power testing by modifying test patterns in the test application process.
     VLSI testing during the test a large number of flip-flops toggle in each shift cycle. such as excessive heat that may reduce circuit reliability, formation of hot spots, difficulty in performance verification, reduction of the product yield and lifetime, and so on. In this paper we will approach a Method to decrease toggle activity of Flip-Flops. minimize the toggle activity caused due to shift-in of the test stimuli. The method counts the switching activity of scan flip-flops during the scan shift-in operations, a suitable scan path is chosen to shift-in the test stimuli.

目錄
致謝	I
中文摘要	II
英文摘要	III
目錄	IV
圖目錄	VI
表目錄	VII
第一章 緒論	1
1.1 前言	1
1.2 研究動機與目的	2
1.3 論文架構	3
第二章 背景知識與相關研究	5
2.1 故障檢測	5
2.2 故障模擬	8
2.3 掃描鏈設計	11
2.4 自動測試圖樣產生(Automatic Test Pattern Generation,ATPG)	15
第三章 文獻分析與探討	16
3.1文獻分析	16
3.2 文獻探討	17
第四章 論文方法	18
4.1 論文原理	18
4.2 加權轉換Weighted Transitions(WTs)	19
4.3 論文應用	22
第五章 實驗結果	27
第六章 結論	29
參考文獻(References)	30

 
圖目錄
圖2.1  OR檢測故障的方式………………………………………………5
圖2.2  AND檢測故障的方式…………………………………………….6
圖2.3  故障覆蓋率(FC)…………………………………………………...7
圖2.4  並行故障模擬……………………………………………………...9
圖2.5  故障模擬範例…………………………………………..………...9
圖2.6  邏輯閘故障模擬……………………………………….………..10
圖2.7  時序電路………………….……………………………………11
圖2.8  (a) 掃描正反器(b) 掃描鏈的範例………………………………12
圖2.9  掃描鏈電路………………….…………….……………………14
圖 3.1  反轉值技術……………….………………………………………16
圖 3.2  掃描技術[3]……………….………………………………………17
圖 4.1  XOR真值表……………………………………………………19
圖 4.2  SC控制線的控制方法…………………………………………….20
圖 4.3  掃描鏈範例……………………......................……………………21
圖 4.4  填充範例………………………………………………..………..22
圖 4.5  掃描鏈SC控制圖…………………..…………………………..23
圖 4.6  SC分成小組…….…………………………………………………24
圖 4.7  SC整體架構……………………………………………………….25
圖 4.8  SC線控制……………………………………………………….26


表目錄
表 1.3 掃描移入模式與應用於組合邏輯的樣本…………………………4
表 5.1 TSA和SC controller WTS 比較實驗數據………………………….27
表 5.2 [3]和SC controller WTS 比較實驗數據……………………………28

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