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系統識別號 U0002-1407200511380100
中文論文名稱 70MHz 帶通轉導電容濾波器與自動頻率調整
英文論文名稱 70MHz Band-Pass Gm-C Filter with Automatic Frequency Tuning
校院名稱 淡江大學
系所名稱(中) 電機工程學系碩士班
系所名稱(英) Department of Electrical Engineering
學年度 93
學期 2
出版年 94
研究生中文姓名 陳建輔
研究生英文姓名 Chien-Fu Chen
學號 692390072
學位類別 碩士
語文別 英文
口試日期 2005-06-08
論文頁數 66頁
口試委員 指導教授-余繁
共同指導教授-鄭國興
委員-劉榮宜
委員-黃弘一
委員-郭建宏
中文關鍵字 轉導  連續時間濾波器  調整 
英文關鍵字 Transconductor  Continuous-time Filter  Tuning 
學科別分類 學科別應用科學電機及電子
中文摘要 類比濾波器是電子電路必須的基本元件,它廣泛用於特定頻率信號之抽取,雜訊和干擾之抑制。現今的訊號處理系統已有邁向全數位化的趨勢,但是我們身處的卻是類比世界,於是類比濾波器作為類比與數位的介面是必須的。積體電路技術的精進與無線通訊的普及,造就了現今的高頻電路與SOC (System On Chip) 的風潮,於是高頻積體電路濾波器相形更為重要,這也是本論文提出的主要動機。濾波器在積體電路上的發展大致可分為被動式濾波器(Passive filter)與主動式濾波器(Active filter),基於SOC的理念,主動式濾波器為考慮的實現方式,主因是主動式濾波器有較小的體積且不需要大的推動功率。基於此濾波器設計於高操作頻率,所以我們又以連續時間的主動濾波器為設計主體。連續時間的主動濾波器是由運算轉導放大器( Operational Transconductance Amplifier, OTA )及電容所構成。
在本研究主題類比濾波器設計方面,先研究提出具有高線性度與寬線性區的運算轉導放大器,再實現到連續時間濾波器上,我們採用四階串接( Cascade )來滿足我們所需的濾波器規格。基本組成的二階濾波器是利用四運算轉導放大器兩組電容(4 OTA 2 C)來實現,此設計方式擁有簡易設計,調整與較少運算轉導放大器的優點。在設計時,考慮寄生電容( Parasitic Capacitance)效應與運算轉導放大器的誤差,此兩項因素將會影響濾波器的轉移函數(Transfer Function),在系統模擬時,修正理想的轉移函式,但是這仍然無法解決製程變異對實現的濾波器所帶來的影響,所以我們在此加入了頻率自動調整的電路,利用帶通濾波器的物理特性對主電路做頻率的調整。由實驗證明,此四階帶通濾波器可以成功的操作在中心頻率70MHz。
英文摘要 The analog filter is the primary element of electronic circuit. Nowadays, signal processing system had been forced to design the digital circuit, but we are living in the analog world actually. As the result, the analog filter is necessary as an interface between analog and digital. Because the integrated circuit is growing quickly, the high frequency circuits and SOC (system on a chip) is designed. Based on these two techniques, the high frequency integrated filter is more needed in the future. In the development of integrated filter circuit, which can be differentiated between passive filter technique and active filter technique. Based on the SOC, the integrated active filter would be preferred, because the integrated active filter has small chip size and low active power. In order to achieve high operation frequency, we choose the continuous-time filters which is made by operational transconductance amplifier (OTA) and capacitors.
The research of this thesis is to design a new operational transconductance amplifier (OTA) which can achieve a 70MHz band-pass filter. The band-pass filter has simulated by TSMC 181P6M technology model. The property of integrated active-filter is decided by its transconductance value, linearity and linear Range. Those will affect frequency response, total harmonic distortion (THD) and input signal range. In this new operational transconductance amplifier, the fully differential structure is preferred, because it has better noise immunity and distortion properties. We use cross-coupling and unbalanced differential pairs as input stages which can increase and compensate transconductance value, linearity and linear range. In order to solve process variation, the automatic frequency tuning is used. It utilizes the phase characteristic of band-pass filter to product Vtune, the error voltage Vtune can be applied to control the frequency. As the result, the center frequency of fourth order band-pass can operate at 70MHz.
論文目次 Table of Contents
CHAPTER 1 INTRODUCTION…………………………………1
1.1 Motivation……………………………………………1
1.2 The Types of Analog Filter………………………1
1.3 Why Gm-C is Needed…………………………………2
1.4 The Focus of the Research and the Thesis……3
CHAPTER 2 TRANSCONDUCTANCE CELL……………………5
2.1 Transconductors……………………………………5
2.1.1 Resistors…………………………………………6
2.1.2 Integrators………………………………………8
2.1.3 Gyrators…………………………………………11
2.2 Parasitic Capacitances and Mismatch………15
2.3 Consideration of Finite Output Impendence in Gm……19
CHAPTER 3 LINEARIZATION TECHNIQUES………………21
3.1 Introduction………………………………………21
3.2 Source Degeneration……………………………24
3.3 Cross-Coupling Differential Pairs…………27
3.4 Unbalanced Differential Pairs………………29
3.5 Floating Voltage Source………………………32
3.6 Using Triode Transistor as Input Stages…34
3.7 Summary and Comparison of Different Designs……36
CHAPTER 4 PROPOSED TRANSCONDUCTOR………………………38
4.1 Introduction………………………………………38
4.2 Linearity and Linear Range……………………39
4.3 Design of Transconductor Cell…………………40
4.4 The Simulation Result of Proposed Transconductor……44
CHAPTER 5 FOURTH-ORDER BAND-PASS FILTER………………46
5.1 Introduction………………………………………46
5.2 The Biquad…………………………………………48
5.3 The Fourth-Order Band-Pass Filter…………52
5.4 Automatic frequency Tuning……………………55
5.5 The Layout of the Filter………………………56
5.6 The Comparison……………………………………60
CHAPTER 6 CONCLUSION……………………………………62
6.1 Conclusion……………………………………………62
6.2 Future Work…………………………………………63
REFERENCES…………………………………………………64

List of Figures
Figure 1.1 Choice of filter type as a function of the operating frequency range…………………………………………2
Figure 2.1 Small-signal model for transconductor and its symbols: (a) single-ended circuit; (b) fully differential circuit…………………………………………………………………5
Figure 2.2 Resistor simulations with transconductors: (a) grounded; (b) floating; (c) negative and differential……7
Figure 2.3 (a) single-ended Gm-C integrator; (b) small-signal model…………………………………………………………8
Figure 2.4 A three-input, single-ended integrator/summer circuit…………………………………………………………………9
Figure 2.5 Lossy Gm-C integrator………………………………9
Figure 2.6 Fully differential Gm-C integrators: (a) single capacitor; (b) two capacitors…………………………………11
Figure 2.7 A fully differential integrator maintaining symmetry and showing parasitic capacitances………………11
Figure 2.8 A gyrator circuit constructed from two voltage controlled current sources……………………………………12
Figure 2.9 A gyrator based on transconductors: (a) generic circuit; (b) small-signal model; (c) passive model for the realized inductor…………………………………………………13
Figure 2.10 Differential realization of grounded inductor: (a) conceptual implementation; (b) final implementation…14
Figure 2.11 Differential realization of a floating inductor………………………………………………………………15
Figure 2.12 A Simple Gm-C Biquad………………………………16
Figure 2.13 Gm-C biquad with equalized total capacitance…18
Figure 2.14 A simple differential OTA…………………………19
Figure 3.1 (a) MOS transistor; (b) small-signal model……22
Figure 3.2 A linearied differential pair using transistors M3 and M4 in the triode region……………………………………25
Figure 3.3 The simulation result of source degeneration differential pair……………………………………………………26
Figure 3.4 A cross-coupled differential pair………………27
Figure 3.5 A simple differential pair…………………………27
Figure 3.6 The simulation result of cross-coupling differential pair……………………………………………………29
Figure 3.7 An unbalanced differential pairs…………………30
Figure 3.8 The idea of unbalanced transconductance compensation…………………………………………………………30
Figure 3.9 The simulation result of unbalanced differential pair……………………………………………………………………32
Figure 3.10 Floating voltage source linearization technique………………………………………………………………34
Figure 3.11 The schematic of triode transistor as input stages…………………………………………………………………35
Figure 4.1 The input stage of proposed transconductor cell……………………………………………………………………40
Figure 4.2 Proposed transconductor cell……………………41
Figure 4.3 The final transconductor cell……………………43
Figure 4.4 The common-mode feedback circuit………………44
Figure 4.5 The linearity and linear simulation of proposed transconductor cell…………………………………………………44
Figure 5.1 The magnitude and phase of an ideal integrator Hid(s) and a practical (non-ideal) integrator Hni(s) …46
Figure 5.2 The magnitude and phase of proposed transconductor……………………………………………………47
Figure 5.3 The biquad structure………………………………48
Figure 5.4 The noise source in the band-pass biquad (one-side)…………………………………………………………………51
Figure 5.5 Post-simulation of fourth-order band-pass filter…………………………………………………………………52
Figure 5.6 The comparison of post-simulation and pre-simulation……………………………………………………………53
Figure 5.7 Transient simulation of input voltage is 0.2Vpp and Frequency is 20MHz……………………………………………54
Figure 5.8 Transient simulation of input voltage is 0.2Vpp and Frequency is 70MHz……………………………………………54
Figure 5.9 Transient simulation of input voltage is 0.2Vpp and Frequency is 120MHz…………………………………………54
Figure 5.10 The block diagram of automatic frequency tuning…………………………………………………………………55
Figure 5.11 The interleaved matching of input stage in proposed transconductor…………………………………………56
Figure 5.12 The total layout of the proposed transconductor cell……………………………………………………………………57
Figure 5.13 The interleaved layout of two capacitors……58
Figure 5.14 The schematic of output buffer…………………58
Figure 5.15 The floor plane of the whole chip……………59
Figure 5.16 The total layout of whole chip…………………59

List of Tables
Table 3.1 Comparison of various linearity techniques……39
Table 5.1 The fourth-order band-pass filter specifications………………………………………………………53
Table 5.2 The comparison of the other works………………60
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