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系統識別號 U0002-1208200912080700
中文論文名稱 降壓式電源轉換器之H∞控制設計與實現
英文論文名稱 H∞ Control Design and Implementation of Buck Converter
校院名稱 淡江大學
系所名稱(中) 電機工程學系碩士班
系所名稱(英) Department of Electrical Engineering
學年度 97
學期 2
出版年 98
研究生中文姓名 王泓智
研究生英文姓名 Hung-Chih Wang
學號 696460178
學位類別 碩士
語文別 中文
口試日期 2009-06-22
論文頁數 111頁
口試委員 指導教授-周永山
委員-練光祐
委員-胡國英
委員-翁慶昌
中文關鍵字 降壓式電源轉換器  H∞控制 
英文關鍵字 Buck power converter  H∞ control 
學科別分類 學科別應用科學電機及電子
中文摘要 在控制理論的發展上,以靜態狀態回授設計的發展較為快速,已存在的設計方法也較動態控制器設計理論多,使得靜態狀態回授設計相對於動態輸出回授設計,在理論設計層面上更具完備性。但是在實務上,靜態狀態回授需擷取系統的狀態訊號做回授控制,假若系統的狀態訊號眾多,則在電路實現上將會相當複雜。但若考量動態輸出回授設計,僅需利用輸出做為回授訊號,因此,在電路實現上會較為簡易。根據以上的說明可知,靜態狀態增益回授設計與動輸出回授設計在理論與實務上有其取捨。
若想使用較為完備的設計理論與較簡易的實現方式來完成系統的設計與實現,就上述的觀點來看是有衝突的。故本論文以此為研究方向,發展出動態控制器與靜態狀態回授增益可等價轉換的設計,使得在設計與實現上皆可以大幅減化困難度。另外,本文提出一種片段式H∞設計方法,不僅比傳統H∞控制有彈性,而且可符合控制力或某些內部訊號符合應有或預設之限制。
本論文以降壓式電源轉換器為設計對象,針對靜態狀態回授與動態回授架構分別在連續時及離散時做設計,並使用數值模擬軟體模型的驗證,以及其軟體中所提供的SimPowerSystems Toolbox做電路設計的驗證,最後以硬體實現來具體呈現並驗證設計之效果。
英文摘要 On the development of control theory, the research on static state feedback design usually advances that of dynamic output feedback design. It is true that more theoretical results using the former control law are now available. But concerning the implementation issue, the states of a system must be measureable if static state feedback is considered. This obviously hampers the use of the control law if the underlying system has many states. On the contrary, the realization of a dynamic output feedback looks much easier in that only the output signal is required. Accordingly, there are tradeoffs for using static state feedback design and dynamic output feedback in both theoretical design and practice.
It looks like a difficult thing, if not impossible, if a designer wants to apply the more complete design theory, but uses easier implementation technique. Based on the above observations, this thesis presents a method which equivalently transforms a dynamic output feedback problem into a static state feedback problem under which the dynamic controller design can be achieved utilizing the profound results developed in the static state feedback cases. Consequently, the dynamic output feedback design problem is greatly benefited by the establishment of the transformation on both theoretical design and implementation. In addition, this thesis proposes a new H∞ design method which offers some flexibility compared to the traditional H∞ controller design. Moreover, constraints on the control input or some internal signals can be incorporated into the integral design.
This thesis takes the DC-DC buck converter as the controlled object. Static state feedback and dynamic output feedback design methods are developed in the continuous-time and discrete-time settings, respectively. Numerical experiments are performed using the software MATLAB and the SimPowerSystems Toolbox of MATLAB. Finally, hardware implementation using FPGA as a digital controller is done to validate the design.
論文目次 中文提要................................................. -I-
英文提要................................................. -II-
目錄..................................................... -IV-
圖目錄.................................................. . -VII-
第一章 緒論 ............................................... -1-
1.1 研究動機........................................... -1-
1.2 研究背景........................................... -3-
1.3 論文架構........................................... -5-
第二章 背景知識........................................... -6-
2.1 降壓式電源轉換器................................... -6-
2.2 交換式電源轉換器之數學模型......................... -11-
2.3 控制器設計方法..................................... -13-
2.3.1 H∞靜態狀態回授設計法............................ -16-
2.3.2 區域極點配置法................................... -19-
2.3.3 控制力受限設計方法............................... -21-
2.4 離散化方法......................................... -22-
2.5 動態控制器實現方法................................. -24-
第三章 連續時之降壓式電源轉換器設計....................... -26-
3.1 片段式H∞狀態回授設計方法.......................... -27-
3.2 系統架構介紹...................................... -35-
3.2.1 靜態狀態回授設計之受控體數學模型................. -36-
3.2.2 動態輸出回授設計之受控體數學模型................. -39-
3.3 靜態狀態回授設計................................... -43-
3.3.1 傳統H∞控制及其他混合式設計...................... -43-
3.3.2 新式H∞控制及其他混合式設計...................... -44-
3.4 動態控制器設計方法................................. -45-
3.4.1 動態控制器與靜態狀態回授增益之轉換............... -45-
3.4.2 傳統H∞控制及其他混合式設計...................... -50-
3.4.3 新式H∞控制及其他混合式設計...................... -51-
3.5 模擬結果........................................... -53-
3.5.1 靜態控制設計模型................................. -54-
3.5.2 靜態控制設計模擬結果............................. -55-
3.5.3 動態控制設計模型................................. -62-
3.5.4 動態控制設計模擬結果............................. -64-
第四章 離散時之降壓式電源轉換器設計....................... -71-
4.1 片段式H∞狀態回授設計方法.......................... -72-
4.2 系統架構介紹....................................... -79-
4.2.1 靜態狀態回授設計之受控體數學模型................. -79-
4.3 靜態狀態回授設計................................... -81-
4.3.1 傳統H∞控制及其他混合式設計...................... -81-
4.3.2 新式H∞控制及其他混合式設計...................... -82-
4.4 模擬結果........................................... -83-
4.4.1 靜態控制設計模型................................. -84-
4.4.2 靜態控制設計模擬結果............................. -85-
第五章 硬體雛型驗證....................................... -92-
5.1 硬體設計........................................... -92-
5.2 實驗結果..........................................-102-
第六章 結論與未來研究方向................................ -108-
參考文獻................................................. -109-


圖2.1 降壓式轉換器........................................-7-
圖2.2 降壓式電源轉換器在連續導通模式下操作................-8-
圖2.3 降壓式電源轉換器之非理想電路模型................... -11-
圖2.4 架構圖........................................-14-
圖2.5 有關連續時系統反應速度極點範圍..................... -19-
圖2.6 有關離散時系統反應速度之極點範圍.................. . -20-
圖2.7 連續時與離散時區域對應關係......................... -22-
圖2.8 連續時與離散時區域對應模擬......................... -23-
圖2.9 動態控制器......................................... -23-
圖2.10 Direct Canonical架構................................. -25-
圖3.1 片段式H∞控制之設計範圍............................ -33-
圖3.2 閉迴路系統狀態軌跡圖............................... -34-
圖3.3 H∞性能成立範圍.................................... -34-
圖3.4 靜態狀態回授系統整體架構圖......................... -36-
圖3.5 靜態狀態回授系統受控體模型......................... -37-
圖3.6 靜態狀態回授系統P-K架構...........................-37-
圖3.7 動態輸出回授整體架構............................... -40-
圖3.8 動態輸出回授系統受控體模型......................... -40-
圖3.9 動態輸出回授系統P-K架構.......................... -41-
圖3.10 動態閉迴路架構..................................... -45-
圖3.11 靜態狀態回授架構................................... -50-
圖3.12 靜態狀態回授設計小訊號模型......................... -54-
圖3.13 具輸入擾動之靜態狀態回授電力系統模型............... -54-
圖3.14 具負載變動之靜態狀態回授電力系統模型............... -55-
圖3.15 輸入電壓擾動時之輸出電壓........................... -56-
圖3.16 輸入電壓擾動時之控制力波形......................... -57-
圖3.17 輸入電壓擾動時之輸出電壓波形....................... -58-
圖3.18 輸出電壓與控制力(傳統H∞混合式設計)................ -59-
圖3.19 輸出電壓與控制力(片段式H∞混合式設計).............. -59-
圖3.20 負載擾動時之輸出電壓波形........................... -60-
圖3.21 輸出電壓與控制力(傳統H∞混合式設計)................ -61-
圖3.22 輸出電壓與控制力(片段式H∞混合式設計).............. -61-
圖3.23 動態輸出回授小訊號模型............................. -62-
圖3.24 具輸入擾動之動態輸出回授電力系統模型............... -63-
圖3.25 具負載變動之動態輸出回授電力系統模型............... -63-
圖3.26 輸入電壓擾動時之輸出電壓波形....................... -65-
圖3.27 輸入電壓擾動時之控制力波形......................... -66-
圖3.28 輸入電壓擾動時之輸出電壓波形....................... -67-
圖3.29 輸出電壓與控制力(傳統H∞混合式設計)................ -68-
圖3.30 輸出電壓與控制力(片段式H∞混合式設計).............. -68-
圖3.31 負載擾動時之輸出電壓波形........................... -69-
圖3.32 輸出電壓與控制力(傳統H∞混合式設計)................ -70-
圖3.33 輸出電壓與控制力(片段式H∞混合式設計).............. -70-
圖4.1 靜態狀態回授設計小訊號模型......................... -84-
圖4.2 具輸入擾動之靜態狀態回授電力系統模型............... -84-
圖4.3 具負載變動之靜態狀態回授電力系統模型............... -85-
圖4.4 輸入電壓擾動時之輸出電壓........................... -86-
圖4.5 輸入電壓擾動時之控制力波形......................... -87-
圖4.6 輸入電壓擾動時之輸出電壓波形....................... -88-
圖4.7 輸出電壓與控制力(傳統H∞混合式設計)................ -89-
圖4.8 輸出電壓與控制力(片段式H∞混合式設計).............. -89-
圖4.9 負載擾動時之輸出電壓波形............................ -90-
圖4.10 輸出電壓與控制力(傳統H∞混合式設計)................ -91-
圖4.11 輸出電壓與控制力(片段式H∞混合式設計).............. -91-
圖5.1 FPGA實驗板外觀................................... -93-
圖5.2 整體系統硬體架構圖................................. -93-
圖5.3 降壓式電源轉換器主電路............................. -94-
圖5.4 PMOS驅動電路..................................... -95-
圖5.5 分壓電路........................................... -96-
圖5.6 ADCS7476之接腳圖................................. -96-
圖5.7 動態輸出回授的電源轉換器的整體架構圖............... -97-
圖5.8 整數化之direct canonical架構......................... -99-
圖5.9 軟體設計整體架構圖................................ -100-
圖5.10 數位控制器 之內部架構圖....................... -101-
圖5.11 FPGA內部整體架構圖.............................. -102-
圖5.12 無載時閘極電壓與輸出電壓漣波波形圖............... -103-
圖5.13 輕載時閘極電壓與輸出電壓漣波波形圖............... -103-
圖5.14 重載時閘極電壓與輸出電壓漣波波形圖............... -104-
圖5.15 輸入擾動(15V→30V)............................... -104-
圖5.16 輸入擾動(30V→15V)............................... -105-
圖5.17 負載變動(2.5Ω→5Ω)............................... -106-
圖5.18 負載變動(5Ω→2.5Ω)............................... -106-

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