本論文有兩個主要研究目標，一是發展出人工神經網路進行多熱源晶片封裝之溫度分佈研究，另一目標是應用灰色理論在多熱源晶片封裝溫度之最高溫度、平均溫度的預測。
    研究結果得知，比較倒傳遞神經網路(Back-Propagation Neural Network, BPN)與Icepak套裝軟體兩種方法顯示，BPN準確度達97﹪，由此顯示應用BPN在多熱源晶片封裝之溫度分佈預測上，BPN是可行、可用的。
    灰色建模運算只需利用少量數據(至少4筆資料)做預測使得計算效率加快。在本研究中，經由Icepak的分析數據進行灰預測建模，經由殘差分析與後驗差檢驗來驗證灰預測模型的準確性，結果顯示本研究所建立的灰預測模型屬於“好”(Good)的等級，這意味著本研究所建立的灰預測模型是精確與準確的。
    本研究結果的主要貢獻在於依此方法在晶片封裝的熱設計與分析上提供設計者更為快速簡便的方法。

An objective of this thesis is to develop an ANN model to obtain the temperature distribution of a IC chip in the packaging processes. Another objective is to predict the highest temperature and mean temperature of it by using the Grey system theory. The calculated results of BPN(Back-Propagation Neural Network) are compared with the simulated results of the software package(Icepack). The accuracy of the results between these two methods is 97%. It shows that the BPN technique is useful to predict the temperature distribution of the IC packaging.
    The advantage of the Grey prediction model is the higher calculating efficiency for a few original data (at least 4 data in the series). In the research, the highest and mean temperatures of eight chips from Icepack simulation are set to be the original data in the GM(1,1) model separately. Then, the predicted results are applied to make the post residual error analysis. The analyzed results show that this Grey prediction model is belong to the “Good” grade. It means this developed GM(1,1) model is precise and accurate.
    The contribution of this research results can be applied to the thermal analysis and design for an IC chip packaging processes.

目    錄
淡江大學論文提要i
英文提要ii
目    錄iii
圖 目 錄vi
表 目 錄ix
第一章 緒論1
       1-1研究背景8
       1-2研究動機與目的16
       1-3研究架構17
第二章文獻回顧19
       2-1 電子構裝19
       2-2 PBGA簡介20
       2-3 多晶片模組的優點23
       2-4 PBGA熱傳效能規劃與散熱考量25
       2-5 PBGA溫度循環效能的可靠性考量27
       2-6 數值方法的應用28
       2-7 IC散熱需求29
第三章 熱傳導影響分析30
       3-1 熱傳導對最高溫度的影響34
       3-2 熱傳導分析的方程式37
       3-3 有限差分法38
       3-4 拉式方程式的有限差分方程式40
       3-5 邊界條件及其有限差分方程式40
           3-5-1 熱對流時的邊界條件41
           3-5-2 熱絕緣的邊界條件43
           3-5-3 二個邊界的交界邊45
           3-5-4 三個邊界的交界點49
       3-6 IC熱傳速率Q的計算52
第四章 相關理論與研究方法54
       4-1 計算流體力學（CFD）54
       4-2 類神經網路（ANN）55
4-3 倒傳遞神經網路（BPN）64
       4-4 灰色系統67
           4-4-1  灰色系統建模理論68
           4-4-2  灰色模型的建立70
           4-4-3  MATLAB77
第五章 BPN實驗78
       5-1倒傳遞神經網路實驗78
           5-1-1 分析實驗流程78
           5-1-2建立分析模型79
           5-1-3建立熱源座標位置80
           5-1-4 PBGA模型分析及溫度監控取樣82
       5-2 BPN訓練與測試網路架構89
           5-2-1 BPN數學模型建立90
           5-2-2 BPN訓練過程93
           5-2-3 BPN訓練結果95
       5-3 BPN測試實驗96
           5-3-1 BPN測試過程99
           5-3-2 BPN測試結果101
       5-4 BPN與Icepak數據比較104
第六章 Grey實驗120
       6-1 建立分析模型122
       6-2 GM(1,1)的原始序列124
       6-3灰預測建模GM（1,1）125
       6-4 Matlab程式撰寫133
       6-5 GM（1,1）模型參數134
       6-6 殘差分析135
       6-7 後驗差檢驗138
           6-7-1 高溫組後驗差檢驗141
           6-7-2 均溫組後驗差檢驗143
       6-8 實驗結果145
第七章 結論146
       7-1結論146
       7-2討論147
參考文獻148
       附錄A訓練組計算流體力學分析資料157
       附錄B 訓練組倒傳遞神經網路預測資料167

圖目錄
圖1-1電子元件損壞主因示意圖2
圖1-2藉由被動式散熱進行熱管理改善的電子產品3
圖1-3電子散熱的熱阻示意圖6
圖1-4不同應用條件的元件熱阻比重7
圖1-5半導體積體電路封裝結構9
圖1-6本研究流程示意圖18
圖2-1基板上的對準符號23
圖2-2有導線通道的PBGA27
圖3-1一維體積元素32
圖3-2二維之熱流動34
圖3-3三維模擬之熱源配置35
圖3-4水平擺置下溫度分佈36
圖3-5垂直擺置下溫度分佈36
圖3-6穩定狀態下三個方向熱傳導38
圖3-7節點在x方向的熱傳導邊界上41
圖3-8節點在x方向的熱絕緣邊界上43
圖3-9節點在兩個邊界的交界邊上45
圖3-10節點在三個邊界的交界點上50
圖4-1 BPN架構66
圖5-1計算流體力學分析模型80
圖5-2定義晶片內熱源位置起點81
圖5-3第1組訓練組晶片內熱源位置座標82
圖5-4分析模型熱傳遞係數83
圖5-5第1組晶片溫度分佈示意圖84
圖5-6晶片表面溫度監控規劃圖85
圖5-7取樣溫度點座標定義圖86
圖5-8 BPN架構圖92
圖5-9 BPN架構6輸入64輸出圖92
圖5-10 BPN訓練流程94
圖5-11訓練組溫度收斂曲線圖95
圖5-12訓練組平均溫度比較圖96
圖5-13 BPN測試流程100
圖5-14 測試組平均溫度103
圖5-15 訓練組100組最高溫度比較圖104
圖5-16 訓練組第1組BPN及Icepak溫度比較圖105
圖5-17 訓練組第2組BPN及Icepak溫度比較圖106
圖5-18 訓練組第3組BPN及Icepak溫度比較圖106
圖5-19 訓練組第4組BPN及Icepak溫度比較圖107
圖5-20 訓練組第5組BPN及Icepak溫度比較圖107
圖5-21 訓練組第6組BPN及Icepak溫度比較圖108
圖5-22 訓練組第7組BPN及Icepak溫度比較圖108
圖5-23 訓練組第8組BPN及Icepak溫度比較圖109
圖5-24 訓練組第9組BPN及Icepak溫度比較圖109
圖5-25 訓練組第10組BPN及Icepak溫度比較圖110
圖5-26 測試組第16組最高溫度比較圖111
圖5-27 測試組第1組BPN及Icepak溫度比較圖112
圖5-28 測試組第5組BPN及Icepak溫度比較圖112
圖5-29 訓練組第1組3D誤差百分比分佈圖113
圖5-30 a BPN訓練組第1組3D溫度分佈圖114
圖5-30 b Icepak訓練組第1組3D溫度分佈圖114
圖5-31 訓練組第2組BPN及Icepak3D溫度分佈圖114
圖5-32 訓練組第3組BPN及Icepak3D溫度分佈圖114
圖5-33 訓練組第4組BPN及Icepak3D溫度分佈圖115
圖5-34 訓練組第5組BPN及Icepak3D溫度分佈圖115
圖5-35 訓練組第6組BPN及Icepak3D溫度分佈圖115
圖5-36 訓練組第7組BPN及Icepak3D溫度分佈圖116
圖5-37 訓練組第8組BPN及Icepak3D溫度分佈圖116
圖5-38 訓練組第9組BPN及Icepak3D溫度分佈圖116
圖5-39 訓練組第10組BPN及Icepak3D溫度分佈圖117
圖5-40 a BPN測試組第1組3D溫度分佈圖117
圖5-40 b Icepak測試組第1組3D溫度分佈圖117
圖5-41測試組第  5組BPN及Icepak3D溫度分佈圖117
圖5-42測試組第13組BPN及Icepak3D溫度分佈圖118
圖5-43測試組第15組BPN及Icepak3D溫度分佈圖118
圖 6-1 CFD分析模型120
圖 6-2 系統中的6個座標輸入121
圖 6-3 灰預測實驗架構圖122
圖 6-4 晶片表面溫度監控規劃圖125
圖 6-5 灰建模與灰預測架構圖129
圖 6-6 高溫組溫度折線圖136
圖 6-7 均溫組溫度折線圖137

表目錄
表1-1表面實裝式（SMT）14
表1-2引腳插入式（PTH）15
表5-1第1組熱源座標資料82
表5-2封裝晶片表面溫度分隔監控區86
表5-3第1組座標與溫度對應表87
表5-4訓練組座標資料及封裝晶片表面溫度資料88
表5-5學習網路設定89
表5-6測試網路設定90
表5-7測試組第1組座標資料97
表5-8測試組座標資料及晶片表面溫度資料98
表5-9 BPN測試組溫度資料102
表5-10溫度誤差比較表119
表6-1封裝晶片表面16點溫度值131
表6-2封裝晶片表面16點高溫組溫度值132
表6-3封裝晶片表面16點均溫組溫度值132
表6-4高溫組灰預測溫度值與殘差分析136
表6-5均溫組灰預測溫度值與殘差分析137
表6-6 預測精度等級表140

[1] Bar-Cohen, A., Kraus, A. D., and Davidson, S. F., 1983, “Thermal Frontiers in the Design and Packaging of Microelectronic Equipment”J. Mechanical Engineering, 105(6), pp.53-59.
[2] Yeh L. T., 1995, “Review of Heat Transfer Technologies in Electronic Equipment,” ASME J. Electronic Packaging, 117, PP.333-339.
[3] Viswanath, R., Wakharkar, V., Watwe, A., and Lwbonheur, V., 2000,“Thermal Performance Challenges from Silicon to Systems,” Intel Technology Journal Q3, pp.1-16.
[4] Sinton, R. A., Kwark, Y., Gruenbaum, P., and Swanson, R. M., 1985,“Silicon Point contact solar cells,” Conference record, 18th IEEE PVSC, pp.61-65.
[5] Mbewe, D. J., Card, H. C., and D.C., 1985, “A model of solar cells for Concentrator photovoltaic and photovoltaic thermal system design,”sol. Energy 35(3), pp.247-258.
[6] Dala, V. L., Moore, A. R., 1997, “Design consideration for high-intensity solar cells,” J. Appl. Phys. 48(3), pp. 1224-1251.
[7] SunPower, 2002, Application notes for HED312 Silicon concentrator Solar Cell.
[8] Horne, W. E., 1993, “Solar energy system”, patent US5269851, USA.
[9] Kraus, A. D., and Bar-Cohen, A., 1995, “Design and Analysis of Heat Sinks,” JohnWiley & Sons Inc.
[10] Goh, T. J., Seetharamu, K. N., Quadir, G. A., Zainal, and Jeevan, K., 2004, “Prediction of Temperature in Silicon Chip with Non-Uniform Power a Lagrangian Interpolation Approach,” Microelectronics International, Vol. 21 No. 2, pp.29-35.
[11] Goh, T. J., Seetharamu, K. N., Quadir, G. A., Zainal, Z. A., and Ganeshamoorthy, K. J., 2004, “Thermal Investigations of Microelectronic Chip with Non-Uniform Power Distribution: Temperature Prediction and Thermal Placement Design Optimization,” Microelectronics International, Vol. 21, No. 3, pp.29-43.
[12] Kos, A., 1993, “Approach to Thermal Placement in Power Electronics using Neural Networks,” Proceedings - IEEE International Symposium on Circuits and Systems, Vol. 4, pp.2427-2430.
[13] Kuan, Y. D., Hsueh, Y. W., Lien, H. C., and Chen, W. P., 2006, “Integrating Computational Fluid Dynamics and Neural Networks to Predict Temperature Distribution of the Semiconductor Chip with Multi-heat Sources,” Lecture Notes in Computer Science: Advances in Neural Networks -ISNN2006, Vol. 3973, pp.1005-1013.
[14] Kuan, Y. D., and Lien, H. C., 2005, “The Integration of the Neural Network and Computational Fluid Dynamics for the Heat Sink Design,” Lecture Notes in Computer Science: Advances in Neural Networks -ISNN2005, Vol. 3498, pp.933-938.
[15] Kuan, Y. D., Lien, H. C., Chen, C. L., and Chen W. P., “An Intelligent Methodology to Predict Temperature Distribution of a Chip with Non-Uniform Power Sources,” Lecture Series on Computer and Computational Sciences, Volume 8, pp.125-128.
[16 ] Chen, C. L., 2007, “Investigation on Thermal Behavior of a Chip with multi-heat-sources by Integration of CFD and Artificial Intelligent,” MA, Technology and Science Institute of Northern Taiwan press.
[17 ] Ellison, G. N., 1989, “Thermal Computation for Electronic Equipment,” R. E. Krieger Publishing Company, Malabar, FL.
[18] Aghazadeh, M., and Mallik, D., 1990, “Thermal Characteristic of Single and Multilayer High Performance POFP Packages,” IEEE Transactions on Components, Hybrids and Manufacturing Technology-Part A, 20(2), pp.975-979.
[19] Ridsdle, Joiner, G., B., Bigler, J. and Torres, V. M., 1994, “Thermal Performance Limits of the QFP Family,” IEEE Transactions on Components, Hybrids, and Manufacturing Technology-Part A, 17(4), pp.427-443.
[20] Edwards, D. R., Hwang, M. and Stearns, B., 1995, “Thermal Enhancement of Plastic IC packages,” IEEE transactions on Components, Hybrids, and Manufacturing Technology-Part A, 20(2), pp.57-67.
[21] Tummala, R. R., and Rymaszewski, E., 1989, “Microelectronics Packaging handbook,” Van Nostrand Reinhold, New York.
[22] Lau. J. H., 1993, “Mount book of Fine Pitch Surface Mount Technology,”Van Nostrand Reinhold, New York.
[23] Lau. J. H., 1993, “Thermal Stress and Strain in Microelectronics Packaging,” Van Nostrand Reinhold, New York.
[24] Lau, J. H., Pao, Y., Larner, C., Twerefour, S., Govila, R., Gilbert, D., Erasmus, S., and Dolot, S., 1994, “Reliability of 0.4 mm Pitch, 256-Pin Plastic Quad Flat Pack NO-Clean and water-Clean Solder Joints,” Soldering & Surface Mount Technology, No. 16.
[25] Seraphin, D. P., Lasky, R., and Li, C. Y., 1989, “Principles of Electronic Packaging,”-Hill McGraw Book Company, New York.
[26] http://www.spil.com.tw/ch/quad.htm 
[27] Lau, J. H., 1997, “Ball Grid Array Technology,” Hon-Hai Precision Industry Company Limited.
[28] Dakuginow, Sambu; Apides, Roland; Lacap, Efren, “Thermal measurement Standards for ASIC packaging,” Semiconductor International V 19n6, 1996.3pp.
[29] Marrs, R.C., 1993, “Recent Developments in Low Cost Plastic MCM’s,” Proceedings International Conference on Multi-Chip Modules, April 14-16, Denver, Colorado, pp.220-229.
[30] Lau, J. H., Miremadi, J., Gleason, J., Haven, R., Ottoboni, S., and S. Mimura, October 1993, “No Clean Mass Reflow of Large over Molder Plastic Pad Array Carriers (OMPAC),” Proceedings of the IEEE International Electronic Manufacturing Technology Symposium, pp.63-75.
[31] Lau, J. H., K. Gratalo, T. Baker, E. Schneider, T. Marmura, 1995, “Reliability of Ball Grid Array Solder Joints under Bending, Twisting, and Vibration Conditions,” Circuit World, pp.77-83.
[32] Marrs, R. C., Freyman, B. J., et al., April 14-16, 1993, “High Density BGA Technology,” Proceedings International conference on Multi-Chip Modules, Denver, COLO., pp.326-329.
[33] Freyman, B. F., Brair, J., and Marrs, R. C., August 29-September 2, 1993, “Surface Mount Process Technology for Ball Grid Array Packaging,” Surface Mount International, San Jose, California, pp.81-85.
[34] Marrs, R. C., February 16-18, 1994, “Thermal Performance of the 28×28mm QFP PowerQuan®,” ITAP & Flip Chip Proceedings, San Jose, California, pp.150-164.
[35] A. Malhammer, 1991, “Heat Dissipation Limits for Components Cooled by the PCB Surface,” I. E. P. S. Conference, San Diego, California, pp.304-311.
[36] Marrs, R. C., May 1-3, 1994, “Advanced BGA Technology for MCM Application,” Nepcon West, Anaheim, California, pp.2006-2111.
[37] Marrs, R. C., January, 1993, “Trends & Drivers in Technology of Low Cost MCM’s,” Workshop Speech, Semi-ISS Conference, Monterey, California.
[38] Marrs, R. C., February 3, 1993, “Low Cost Plastic MCM Technology Trends,” Luncheon Speech, 5th International TAB & Advanced Packaging Conference, San Jose, California.
[39] Tummula R., February 7-11, 1993, “Multi-chip Technologies from Personal Computers to Mainframes and Supercomputers,” pp.637-643.
[40] Khadpe S., February 2-5, 1993, “A Global View of Technology and Market Trends in TAB/Advanced Packaging,” 5th International TAB/Advanced Packaging Symposium, pp.1-8.
[41] Ludwig L., Sapozhnikova E., Lunin V., Rosenstiel W., 2000, “Error Classification and Yield Prediction of Chips in Semiconductor Industry Applications,” Neural Computing & Applications, Vol.9, pp.202-210.
[42] A. Lin, February 1993, “Low Cost Multi-Chip Modules,” Nepcon West, pp.64-649.
[43] J. Kennedy and S. Diamond, Summer, 1993, “High Speed 
Performance: Spice Modeling Helps Optimize Interconnect,” 
Advanced Packaging, pp.10-13.
[44] R. Sigliano, Spring, 1993, “Design for Test: Eliminating the Noise from Packages,” Advanced Packaging, pp.10-12.
[45] D. Hattas, Summer, 1993, “BGAs Face Production Testing,” Advanced Packaging, pp.44-46.
[46] C. Luchinger, J. Beuers, A. Fiebig, and W. Werner, Jan/Feb 1994, “Inside Solder Connections: Examining the Metallurgy of Soft-Solder Alloys and the Influence of Intermetallic Layers,” Advanced Packaging, pp.14-19.
[47] R. Kninght, R. Johnson , J. Suhling, J. Evens, C. Romanczuk, and S.Burcham, Jan/Feb. 1994, “Thermal Analysis: Modeling the Thermal Performance of an Automotive Powertrain Controller ’s Components Mounted on an Insulated Metal Substrate,” Advanced Packaging, pp.30-34.
[48] H. Markstine, Dec.1993, “Impedances Dictate Backplane Design,” Electronic Packaging & Production, pp.38-40.
[49] I. Bhutta, A. Elshabini, and Sedki Riad, second quarter 1993, “Measurement Modeling and Simulation of Electronic Packages,”The International Journal of Microcircuits & Electronic Packaging, pp.161-166.
[50] C. Lassen, Jan/Feb., 1994, “Silicon Packaging: The Aluminum Nitride Domain,” Advanced Micro Electronics, pp. 41-42.
[51] “Technical Discussion,” Apr. 1990, EG & G Wakefield Engineering, Heat Dissipation Components Catalog, pp.5-14
[52] D. Mallik and B. Bhattacharyya, May 1989, “High Performance PQFP,” Proceedings IEEE 39th Electronic Components Conference, Houston.
[53] Christie, J. Geankoplis, 1978, “Transport Processes and Unit Operations,” pp.125-301.
[54] Brice Carnahan, H. A. Luther, James O. Wilkes, 1997, “Applied Numerical Methods, Approximation of Solution of Partial Differential Equations,” John Wiley & sons Inc, 
New York. pp.429-530.
[55] Hong, H. Lee, 1990, “Fundamentals of Microelectronics 
Processing,” McGraw-Hill Publish, pp.470-497.
[56] J. P. Holman, 2000, “Heat transfer,” McGraw-Hill Companies, Inc.
[57] Matweb, http://www.matweb.com
[58] Material Emissivity Properties,
http://www.electro-optical.com/bb_rad/emissivity/matlemisivty.htm.
[59] Zhao, Z., 2003, “Thermal design for a broadband communication system with detailed modeling for TBGA packages,” Microelectronics Reliability, 43, pp.785-793.
[60] Icepak 4.1 User’s Guide, Fluent Inc., 2003.
[61] McCulloch W. S., Pitts W., 1943, “A Logical Calculus of the ideas Immanent in Nervous Activity,” Bulletin of Mathematical Biophysics,” No.5, pp.115-133.
[62] D. O. Hebb, 1949, “The Organization of Behavior,” New York：Wiley.
[63] W. McCulloch & W. Pitts, 1943, “A Logical Calculus of the ideas Immanent in Nervous Activity,” Bulletin of Mathematical Biophysics, Vol.5, pp.115-133.
[64] D. E. Rumelhart & J. L. McClelland, 1986, eds. Parallel Distributed Processing: “Explorations in the Microstructure of Cognition,” Vol.1, Cambridge, MA, Massachusetts Institute of Technology Press.
[65] Minsky M. L. & Papert S. A., 1969, “Perceptions Cambridge,” MA, Massachusetts Institute of Technology Press.
[66] D. E. Rumelhart, G. E. Hinton. & R.J. Williams, 1986, “Learning Representations by Back-Propagating Errors,” Nature, Vol.323, pp.553-536.
[67] Jiawei, Han & Micheline, Kamber, 2001 “Data Mining Concepts and Techniques”
[68] Lien, H. C., 2003,“Combining Feature Selection with Decision Theory for Yarn Grading,” Ph. D., National Central University press.
[69] Chang, S. H., 1997, “ACURAD Die Casting Process Optimization using the Grey Relational Analysis Method Approach,” The Journal of Grey System Vol. 8 No. 3, pp.269
[70] Chang, S. H., Hwang J. R., Doong, J. L., 1998, “Optimizing the Injection Molding Process of Polyethylene Terephthalate using the Grey Relational Analysis,” The Journal of Grey System Vol. 10 No. 4, pp.371.
[71] Xian-min W., Zai-kang C., Chang-zhi Y., You-ming C., 1999, “Grey Predicting Theory and Application of Energy Consumption of Building,” Heat-Moisture System, Vol. 34, pp.417.
[72] William, J. Palm ΙΙΙ, 2005, “Introduction to MATLAB 7 for Engineers,” McGraw-Hill Companies, Inc., pp. 147-148.
[73] D. Hilbert, W. Ackermann, 1986, “Principles of mathematical logic,”pp.71-76.
[74] Aleksandar, Zecevic, Dragoslav, D. Siljak, 2010, “Control of complex systems: structural constraints and uncertainty,” Boston MA：Springer Science+ Business Media, LLC, pp.50-56.
[75] Deng Julong, 1989, “Introduction to Grey System Theory,”The Journal of Grey System, Vol. 1, No. 1.
[76] 肖新平、鄧旅成、查金茂編著,“灰色系統分析理論及其應用”
大連海事大學出版社, 1997年10月第1版, 頁168-169.