近幾年來隨著電子產業的蓬勃發展，各式各樣的電子產品亦充滿在我們的生活之中，然而為了維持各式的電子產品運作，最基本的電力部份更是不可或缺的設備之一，這些基本電力設備當中多數之需求又以交流對直流轉換器為主，因此對於電力設備的轉換效率便顯得相當重要。而評估轉換效率的優劣則是以功率因數值為主要的依據，目前的產業界以及學術界當中對於如何有效提升功率因數值，也有相當多的研究與相關產品，因此如何有效提升用電設備的電源使用效率便具有相當重要的研究發展價值。

功率因數值的計算是根據實際消耗功率與視在消耗功率的比值為基準，因此功率因數不佳的電力設備即代表存在著不必要的虛功以及諧波成份。而電力設備所產生的虛功與諧波不僅無謂的加重公用電源設備的負擔，增加無謂的功率消耗，更因為諧波成份的加入而使得電源品質惡化，增加精密設備損壞與誤動作的風險。

為了提高用電設備的效率以及減少所造成的諧波污染，在本文中提出了一個高效能的主動功率因數校正電路，本架構是以電壓電流以及負載的關係，將輸入電壓以及輸出負載經由運算後得到理想的輸入電流，使得輸入電流幾乎與輸入電壓同相位且無失真，藉此消除輸入電壓與輸入電流之相位差與電流失真，以減少電力的虛功消耗以及諧波成份。

最後，我們更進一步的使用TSMC 0.5μm 5V/40V CMOS製程實現文中的主動式功率因數校正電路，以驗証本架構之可行性。並且經由模擬結果顯示本架構在固定及變動式負載下，皆可達到99%以上的功率因數值。

In last years, the flourishing development of electronic industry fills with a lot of electronic products in our life. However, basic power components are indispensable equipment for maintain various electronic products. Since most demands rely mainly on AC to DC converter in these basic power equipments. The conversion efficiency is quite important to power equipments. The quality of assessing conversion efficiency is to regard power factor as main basis. In present industrial circle and academia has many research and relevant products to improvement power factor effectively. Therefore, it has quite important research value how about to improve power efficiency of power equipments.
The calculation of power factor is according to ratios of real power and total power. Lower power factor electric equipment representative have unnecessary busywork and harmonic components. Electronic equipment produces busywork and harmonic components that not only increase unnecessary loading and power consumption in public power equipment. But also harmonic components insert into public power system that causes deteriorating of power quality. Risks increase into break and mistake of precision instrument.
  
In order to improve efficiency of the electric equipment and reduce the harmonic pollution caused. In this thesis proposes a high efficient active power factor corrector circuit. This architecture is with relation among voltage, current, and loading. The ideal input current is calculated from input voltage and output loading. This ideal input current will make sure nearly with between phase and undistorted wave of input voltage. It can dispel current distortion and phase difference between input voltage and input current, and it can reduce busywork consumption and harmonic components.

Finally, the proposed active power factor correction circuit is implemented by TSMC 0.5μm 5V/40V CMOS technology to verify feasibility of the architecture. Simulation results show that power factor can be more than 99% in the proposed architecture for constant and variable loading.

目錄
		
		
中文摘要	I
英文摘要	III
目錄	V
圖表目錄	VIII
		
第一章	緒論	1
1.1	研究動機及目的	1
1.2	研究方向	4
1.3	本文內容	7
第二章	功率因數校正與電力轉換器	8
2.1	功率因數之定義	8
	2.1.1　相位移因子（Displacement Factor）	10
	2.1.2　畸變因子（Distortion Factor）	11
2.2	功率因數校正控制法	14
	2.2.1　連續導通模式	14
	2.2.1.1　峰值電流控制法（Peak Current Control）	16
	2.2.1.2　磁滯電流控制法（Hysteresis Current Control）	16
	2.2.1.3　平均電流控制法（Average Current Control）	17
	2.2.2　不連續導通模式	18
2.3	昇壓型電力轉換器	19
	2.3.1　功率電晶體導通分析	20
	2.3.2　功率電晶體關閉分析	21
第三章	功率因數校正系統	23
3.1	功率因數校正應用系統	24
	3.1.1　交流輸入信號	25
	3.1.2　電壓迴授參考信號	25
	3.1.3　輸入電流迴授信號	27
3.2	功率因數校正系統架構	30
	3.2.1　功率因數校正乘法架構	31
	3.2.2　功率因數校正振幅修正	32
3.3	脈衝寬度調變系統與轉導電路	36
3.4	帶差參考電路（Bandgap Reference）設計原理	38
第四章	硬體架構設計	40
4.1	系統偏壓電路	41
4.2	功率因數校正乘除法器設計	44
	4.2.1　功率因數校正除法器設計	47
	4.2.2　功率因數校正乘法器設計	50
	4.2.3　功率因數校正系統時序控制電路	54
	4.2.4　電壓電流轉換器	56
	4.2.5　比較器（Comparator）	62
4.3	單位增益緩衝器（Unit-Gain Buffer）	64
4.4	轉導電路（Transconductor）設計	69
4.5	脈衝寬度調變電路	75
4.6	電源系統（Power System）	77
4.7	帶差參考電路（Bandgap Reference）實現	81
	4.7.1　帶差參考電路	82
	4.7.2　啓動電源系統產生電路	84
	4.7.3　帶差參考電路對系統電源穩定度分析	85
第五章	系統模擬與分析	88
第六章	結論	90
6.1	總結	90
6.2	未來展望	90
參考文獻	92


圖表目錄
		
		
圖目錄	
圖1.1	橋式整流器	2
圖1.2	橋式整流器電壓輸出波形	2
圖1.3	交直流轉換器輸入電流與電壓	3
圖1.4	交換式電源供應器架構圖	4
圖1.5	具功率因數校正之交換式電源供應器	5
圖1.6	電源供應器輸入電流與電壓	6
圖1.7	具功率因數校正之電源供應器輸入電壓與電流波形	6
圖2.1	電容性負載波形圖	10
圖2.2	電感性負載波形圖	11
圖2.3	電流畸變波形圖	12
圖2.4	乘法器功率因數控制法	15
圖2.5	峰值電流控制法波形	16
圖2.6	磁滯電流控制法波形	17
圖2.7	平均電流控制法波形	18
圖2.8	電壓隨耦法	18
圖2.9	昇壓型電力轉換器	20
圖2.10	昇壓型電力轉換器開關導通模式	21
圖2.11	昇壓型電力轉換器開關關閉模式	22
圖3.1	交換式電源供應系統	23
圖3.2	功率因數校正電路系統信號	24
圖3.3	橋式整流交流輸入電壓信號	25
圖3.4	交換式電源供應器之電流輸入等效電路	26
圖3.5	克希荷夫電流定律化簡示意圖	28
圖3.6	輸入電流迴授信號	29
圖3.7	功率因數校正系統架構圖	30
圖3.8	功率因數校正系統簡化圖	31
圖3.9	交流市電有效值運算電路	33
圖3.10	電壓與電流振幅計算示意圖	34
圖3.11	功率因數校正系統乘除法器架構圖	35
圖3.12	脈衝寬度調變系統	36
圖3.13	脈衝寬度調變波形圖	37
圖3.14	帶差參考電壓產生器	39
圖4.1	系統偏壓電路	42
圖4.2	5V系統偏壓電路	43
圖4.3	乘除法器系統架構圖	45
圖4.4	除法電路	48
圖4.5	除法電路波形圖	49
圖4.6	功率因數校正除法電路	50
圖4.7	乘法電路	51
圖4.8	乘法電路波形圖	51
圖4.9	功率因數校正乘法電路	53
圖4.10	乘除法器靜止時間產生器	54
圖4.11	靜止時間產生器波形圖	55
圖4.12	乘除法電路時序產生器	55
圖4.13	時序產生器波形圖	56
圖4.14	電壓電流轉換器	57
圖4.15	電壓電流轉換運算放大器	58
圖4.16	輸入共模準位分析	58
圖4.17	電壓電流轉換線性度分析	60
圖4.18	電壓電流轉換器短通道調變效應分析	61
圖4.19	比較器電路圖	62
圖4.20	比較器遲滯曲線分析	62
圖4.21	單位增益緩衝器系統圖	64
圖4.22	單位增益緩衝器電源系統波形圖	65
圖4.23	單位增益緩衝器電源產生電路	66
圖4.24	單位增益緩衝器電源產生電路模擬波形圖	67
圖4.25	單位增益緩衝器系統模擬	68
圖4.26	負載迴授參考信號轉導電路	70
圖4.27	脈衝寬度參考信號轉導電路	71
圖4.28	轉導電路架構圖	72
圖4.29	負載迴授參考信號轉導電路輸入電壓對轉導分析	73
圖4.30	脈衝寬度參考信號轉導電路輸入電壓對轉導分析	73
圖4.31	負載迴授參考信號轉導電路輸入頻率對轉導分析	74
圖4.32	脈衝寬度參考信號轉導電路輸入頻率對轉導分析	74
圖4.33	脈衝寬度調變電路	75
圖4.34	時脈產生器	76
圖4.35	脈衝寬度調變電路波形圖	76
圖4.36	操作電源系統產生器	78
圖4.37	高壓電源系統對操作電源系統直流分析	79
圖4.38	高壓電源系統對操作電源系統頻率響應分析	79
圖4.39	操作電源系統對溫度變異分析	80
圖4.40	帶差參考電壓系統方塊圖	81
圖4.41	帶差參考電路	82
圖4.42	帶差參考電路映射點電壓分析	83
圖4.43	帶差參考電壓對溫度變化直流分析	83
圖4.44	核心電源產生電路	85
圖4.45	帶差參考電壓對核心電源直流分析	86
圖4.46	帶差參考電路系統模擬	87
圖5.1	功率因數校正系統模擬	88
圖5.2	負載對功率因數分析	89
		
表目錄	
表3.1	功率因數校正信號表	29
表4.1	電壓電流轉換器規格表	59
表4.2	電壓電流轉換器短通道調變效應統計表	61
表4.3	比較器遲滯曲線統計表	63

[1]	B. Murari, F. Bertotte, G. A. Vignola, Smart Power ICs: Technologies and Applications, 2nd Edition, Berlin:Springer, 2002.

[2]	C. Zhou, R. B. Ridey, F. C. Lee, “Design and Analysis of a Hysteretic Boost Power Factor Correction Circuit,” IEEE 21st Annual PESC 1990, June 11-14, 1990 , pp. 800-807.

[3]	R. B. Ridely, “A New Small-Signal Model for Current-Mode Control,” Dissertation of Virginia Polytechnic Institute, Nov. 27, 1990.

[4]	L. Dixon, “Average Current Mode Control of Switching Power Supplies,” Unitrode Application Note, U140.

[5]	R. J. King, “Analysis and Design of an Unusual Unity-Power-Factor Retifier,” IEEE Transactions on Industrial Electronics, vol. 38, no. 2, Apr. 1991, pp 126-134.

[6]	D. S. Chen and J. S. Lai, “A Study of Power Correction Boost Converter Operating at CCM-DCM Mode,” IEEE Southeastcon 1993, Apr. 4-7, 1993, pp. 6.

[7]	J. S. Lai and D. Chen, “Design Consideration for Power Factor Correction Boost Converter Operating at The Boundary of Continuous Conduction Mode and Discontinuous Conduction Mode,” IEEE APEC 1993, Mar. 7-11, 1993, pp. 267-273.

[8]	A. Arias, M. G. Jayne, E. Aldabas, and J. L. Romeral, “A New Hysteresis Band Current Controller,” IEEE 33rd Annual PESC 2002, vol.2, June 23-27, 2002, pp. 1058-1062.

[9]	C. Gatlan and L. Gatlan, “AC to DC PWM Voltage Source Converter Under Hysteresis Current Control,” IEEE ISIE 1997, vol. 2, July 7-11, 1997, pp. 469-473.

[10]	M. O. Eissa, S. B. Leeb, G. C. Verghese, and A. M. Stankovic, “A Fast Analog Controller for a Unity-Power Factor AC/DC Converter,” IEEE APEC 1994, Orlando, FL, USA, Feb. 13-17, 1994, pp. 551-555.

[11]	O. Garcia, J. A. Cobos, P. Alou, R. Prieto, J. Uceda, and S. Ollero, “A New Family of Single Stage AC/DC Power Factor Correction Converters with Fast Output Voltage Regulation,” IEEE 28th Annual PESC 1997, vol. 1, June 22-27, 1997, pp. 536-542.

[12]	J. Sun, W. C. Wu, and R. M. Bass, “Large-Signal Characterization of Single-Phase PFC Circuits with Different Types of Current Control,” IEEE APEC 1998, vol. 2, Feb. 15-19, 1998, pp. 655-661.

[13]	G. Zhu, C. Iannello, P. Kornetzky, and I. Batarseh, “Large-Signal Modeling of a Single-Switch Power Factor Correction Converter,” IEEE 31st Annual PESC 2000, vol. 3, June 18-23, 2000, pp. 1351-1357.

[14]	Y. W. Lu, W. Zhang, and Y. Liu, “A Large Signal Dynamic Model for Signal-Phase AC-to-DC Converters with Power Factor Correction,” IEEE 35th Annual PESC 2004, vol. 2, June 20-25, 2004, pp. 1057-1063.

[15]	D. A. Johns and K. Martin, Analog Integrated Circuit Design, New York: Wiley, 1997.

[16]	B. Razavi, Design of Analog CMOS Integrated Circuits, Boston: McGraw-Hill, 2001.

[17]	Y. P. Tsividis, “Accurate Analysis of Temperature Effects in Ic-Vbe Characteristics with Application to Bandgap Reference Sources,” IEEE Journal of Solid-State Circuits, vol. SC-15, Dec. 1980, pp. 1076-1084.

[18]	M.A.T. Sanduleanu, A.J.M. Van Tuijl, and R.F. Wassenaar, “Accurate Low Power Bandgap Voltage Reference in 0.5um CMOS Technology,” Electronics Letters, vol. 34, May 14, 1998, pp. 1025-1026.

[19]	Y. Jiang and E.K.F. Lee, “Design of Low-Voltage Bandgap Reference Using Transimpedance Amplifier,” IEEE Transactions on Circuits and Systems II, vol. 47, no. 6, June 2000, pp. 552-555.

[20]	C. Y. Leung, K. N. Leung, and P.K.T. Mok, “Design of a 1.5-V High-Order Curvature-Compensated CMOS Bandgap Reference,” IEEE ISCAS 2004, vol. 1, May 23-26, 2004, pp. I-48-52.

[21]	A. Tajalli, M. Atarodi, A. Khodaverdi, and F. Sahandi Esfanjani, “Design and Optimization of a High PSRR CMOS Bandgap Voltage Reference,” IEEE ISCAS 2004, vol. 1, May 23-26, 2004, pp. I-45-48.

[22]	Y. Jiang and E.K.F. Lee, “A Low Voltage Low 1/f Noise CMOS Bandgap Reference,” IEEE ISCAS 2005, vol. 4, May 23-26, 2005, pp. 3877-3880.

[23]	S. Strilk, “Bandgap Voltage Reference: Errors and Techniques for Their Minimization,” IEEE International Baltic Electronics Conference, Tallinn, Estonia, Oct. 2006, pp. 1-4.

[24]	C. H. His, “Modeling and Controller Design for Zero-Current-Zero-Voltage-Transition Soft-Switching Boost Power Converter,” M.S. Thesis, Dept. of Engineering Science, NCKU, 2001.

[25]	H. I. Yeh, “Control Analysis and Study of Power Factor for Switch-Mode Power Supply System,” M.S. Thesis, Dept. of Power Mechanical Engineering, NTHU, 2003.

[26]	K. F. Cheng, “Design and Modeling of Power Factor Correction Circuits,” M.S. Thesis, Dept. of Electrical Engineering, NSYSU, July 2005.

[27]	J. L. Fang, “Design and Implementation of High Efficient Active Power Factor Correction Circuits,” M.S. Thesis, Dept. of Electrical Engineering, NSYSU, Oct. 2006.

[28]	A. A. Fayed and M. Ismail, “A Low-Voltage, Highly Linear Voltage-Controlled Transconductor,” IEEE Transactions on Circuits and Systems II, vol. 52, no. 12, Dec. 2005, pp. 831-835.

[29]	W. Langeslag, R. Pagano, K. Schetters, A. Strijker, A. van Zoest, “VLSI Design and Application of a High-Voltage-Compatible SoC-ASIC in Bipolar CMOS/DMOS Technology for AC-DC Rectifiers,” IEEE Transactions on Industrial Electronics, vol. 54, no. 5, Oct. 2007, pp. 2626-2641.

[30]	A. A. EI-Adawy and A. M. Soliman, “A Low-Voltage Single Input Class AB Transconductor with Rail-to-Rail Input Range,” IEEE Transactions on Circuits and Systems I, vol. 47, no. 2, Feb. 2000, pp. 236-242.

[31]	M. Laguna, C. De La Cruz-Blas, A. Torralba, R. G. Carvajal, A. Lopez Martin, and A. Carlosena, “A Novel Low-Voltage Low-Power Class-AB Linear Transconductor,” IEEE ISCAS 2004, vol. 1, May 2004, pp. 725-728.

[32]	A. A. Fayed and M. Ismail, “A Low-Voltage, Highly Linear Voltage-Controlled Transconductor,” IEEE Transactions on Circuits and Systems II, vol. 52, no. 12, Dec. 2005, pp. 831-835.

[33]	P. Bruschi, N. Nizza, F. Pieri, M. Schipani, and D. Cardisciani, “A Fully Integrated Signle-Ended 1.5-15-Hz Low-Pass Filter With Linear Tuning Law,” IEEE Journal of Solid-State Circuits, vol. 42, no. 7, July 2007, pp. 1522-1528.

[34]	梁適安譯，高頻交換式電源供應器原理與設計，第二版，全華科技圖書，1995.

[35]	梁適安，交換式電源供給器之理論與實務設計，全華科技圖書，2001.