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系統識別號 U0002-0408202017550600
DOI 10.6846/TKU.2020.00087
論文名稱(中文) 應用於心電圖量測之連續漸進式類比數位轉換器
論文名稱(英文) A Successive Approximation Analog-to-Digital Converter for Electrocardiography Applications
第三語言論文名稱
校院名稱 淡江大學
系所名稱(中文) 電機工程學系碩士班
系所名稱(英文) Department of Electrical and Computer Engineering
外國學位學校名稱
外國學位學院名稱
外國學位研究所名稱
學年度 108
學期 2
出版年 109
研究生(中文) 呂雨柔
研究生(英文) Yu-Jou Lu
學號 607440046
學位類別 碩士
語言別 繁體中文
第二語言別
口試日期 2020-07-09
論文頁數 57頁
口試委員 指導教授 - 施鴻源
委員 - 楊維斌
委員 - 陳信良
關鍵字(中) 類比數位轉換器
心電圖量測
低功耗
關鍵字(英) Analog-to-digital converter
ECG measurement
low power consumption
第三語言關鍵字
學科別分類
中文摘要
隨著醫療技術不斷進步,導致老年人口增加,各種文明疾病也層出不窮。此外,近年來電子技術蓬勃發展。因此將電子技術與醫療結合成為一種趨勢。台灣擁有先進的半導體製程技術,能夠製作低功耗且面積小的晶片,達到生醫電子超低功耗的需求。將穿戴裝置用以偵測各種生理訊號達到居家照護的目的將成為趨勢。
    心電圖是紀錄心臟跳動時電壓變化的一種圖形。因心臟的肌肉有自動規律收縮的特性,所以在收縮之前會先在心臟的傳導系統產生一個激動波,激動波會使整個心臟的肌肉興奮而產生收縮。這些激動波的產生和傳導會形成微弱的電流而分佈到全身。若將心電圖記錄器的電極連接到身上不同的部位,就可以記錄而得到心電圖。根據心電圖的量測結果來判斷是否有心律不整的疾病,將心電圖的貼片貼在胸前,再將心電圖記錄器安置在病人身上,作長時間的監控及記錄心臟是否規律的跳動來即時發現心臟疾病的發生。
    我們要量測的心電訊號屬於低頻訊號,訊號頻率約為0.15Hz ~150Hz且振幅微小僅10mV的範圍。此設計中採用UMC 0.18um CMOS標準製程來實現一個應用於心電圖量測的類比數位轉換器,其工作電壓為1.8V,取樣頻率為4KHz,Pre-Simulation的ENOB達到9.7,平均功耗為18.18μW。
英文摘要
With the continuous advancement of medical technology, the elderly population has increased, and various civilization diseases have emerged in an endless stream. In addition, electronic technology has flourished in recent years. Therefore, the combination of electronic technology and medical treatment has become a trend. Taiwan has advanced semiconductor manufacturing technology that can produce chips with low power consumption and small area to meet the ultra-low power consumption requirements of biomedical electronics. It will become a trend to use wearable devices to detect various physiological signals for home care purposes.
An electrocardiogram is a graph that records changes in voltage when the heart beats. Because the heart muscles contract automatically and regularly, an excitement wave is generated in the conduction system of the heart before contraction. The excitement wave excites the entire heart muscle and produces contraction. The generation and conduction of these excitatory waves will form a weak current and be distributed throughout the body. If you connect the electrodes of the ECG recorder to different parts of your body, you can record and get an ECG. Determine whether there is arrhythmia disease according to the measurement results of the electrocardiogram, stick the electrocardiogram patch on the chest, and then place the electrocardiogram recorder on the patient, monitor for a long time and record whether the heart is beating regularly for immediate detection The occurrence of heart disease.
The ECG signal is a low-frequency signal, the signal frequency is about 0.15 Hz ~ 150 Hz and the amplitude is only 10mV. In this design, UMC 0.18 um CMOS standard process is used to realize an analog-to-digital converter for ECG measurement. Its working voltage is 1.8 V, sampling frequency is 4 KHz, Pre-Simulation ENOB reaches 9.7, and average power consumption is 18.18 μW .
第三語言摘要
論文目次
目錄
中文摘要	II
英文摘要	III
目錄	IV
圖目錄	VII
表目錄	X
第一章   緒論	1
1.1研究背景	1
1.2研究動機	1
1.3論文架構	3
第二章   類比數位轉換器基本原理與架構分析	4
2.1類比數位轉換器架構介紹	4
2.1.1快閃式類比數位轉換器(Flash or Parallel ADC)	5
2.1.2管線式類比數位轉換器(Pipeline ADC)	7
2.1.3連續漸進式類比數位轉換器(Successive Approximation ADC)	8
2.1.4遞迴式類比數位轉換器(Cyclic or Algorithmic ADC)	10
2.1.5積分式類比數位轉換器(Integrating ADC)	12
2.2類比數位轉換器之重要參數介紹	13
2.2.1解析度	13
2.2.2最小有效位元	14
2.2.3量化誤差	14
2.2.4缺碼	15
2.2.5延遲時間	15
2.2.6微分非線性誤差(Differential Non-Linearity,DNL)	16
2.2.7積分非線性誤差(Integral Non-Linearity,INL)	16
2.2.8信號雜訊比	17
2.2.9信號雜訊失真比	18
2.2.10有效位元	18
2.2.11奈奎斯取樣定理	19
2.3 數位類比轉換器架構比較	20
2.3.1二元加權電阻式數位類比轉換器	20
2.3.2 R-2R階梯式數位類比轉換器	21
2.3.3電容式數位類比轉換器	22
2.3.4分列式電容數位類比轉換器	23
第三章   連續漸進式類比數位轉換器電路設計	24
3.1類比數位轉換器輸入NF分析	24
3.2連續漸進式類比數位轉換器基本架構	26
3.3追蹤保持電路設計	27
3.3.1取樣MOS開關	27
3.3.2 CMOS互補式開關(Complementary Transmission Switch)	28
3.3.3假冒式開關(Dummy Switch)	30
3.3.4追蹤保持電路設計	32
3.3.5雜訊功率與取樣電容關係	34
3.4比較器電路設計	35
3.5連續漸進式控制器電路設計	37
3.6數位類比轉換器電路設計	39
3.7類比數位轉換器時序	40
第四章   連續漸進式類比數位轉換器模擬結果	41
4.1追蹤保持電路模擬	41
4.2比較器電路模擬	42
4.3連續漸進式控制器電路模擬	46
4.4數位類比轉換器電路模擬	47
4.5連續漸進式類比數位轉換器電路模擬	48
第五章   晶片量測	52
5.1 連續漸進式類比數位轉換器量測方法	52
5.1.1輸入訊號方法	53
第六章   結論與未來展望	55
參考文獻	56

圖目錄
圖2.1類比數位轉換器資料轉換過程	4
圖2.2 ADC種類比較圖	5
圖2.3快閃式類比數位轉換器架構圖	6
圖2.4管線式類比數位轉換器架構圖	7
圖2.5連續漸進式類比數位轉換器架構圖	8
圖2.6連續漸進式類比數位轉換器架構圖	9
圖2.7遞迴式類比數位轉換器架構圖	11
圖2.8積分式類比數位轉換器架構圖	12
圖2.9理想3位元ADC類比數位轉換關係	14
圖2.10 ADC之量化誤差	15
圖2.11二元加權電阻式數位類比轉換器	20
圖2.12 R-2R階梯式數位類比轉換器	21
圖2.13電容式數位類比轉換器	22
圖2.14分裂式電容數位類比轉換器	23
圖3.1心電圖量測簡易系統圖	24
圖3.2連續漸進式類比數位轉換器方塊圖	26
圖3.3追蹤保持電路	28
圖3.4互補式開關	28
圖3.5電荷注入效應	29
圖3.6假冒式開關	30
圖3.7時脈饋入效應	31
圖3.8假冒式開關原理圖	31
圖3.9追蹤保持電路	32
圖3.10 RC電路	34
圖3.11互補式開關的開啟電阻圖	34
圖3.12比較器電路	35
圖3.13重複歸零比較器	36
圖3.14連續漸進式控制器	37
圖3.15數位類比轉換器電路	39
圖3.16類比數位轉換器方塊圖	40
圖3.17類比數位轉換器時序圖	40
圖4.1追蹤保持電路模擬圖	41
圖4.2 Vip=0.01V 比較器電路模擬圖	42
圖4.3 Vip=0.9V比較器電路模擬圖	43
圖4.4 Vip=1.79V比較器電路模擬圖	43
圖4.5 Vip=0.015V  LSB≥160μV	44
圖4.6 Vip=0.900V  LSB≥80μV	44
圖4.7 Vip=1.785V  LSB≥127nV	45
圖4.8低電位連續漸進式控制器電路模擬圖	46
圖4.9高電位連續漸進式控制器電路模擬圖	46
圖4.10數位類比轉換器電路模擬圖	47
圖4.11類比數位轉換器電路模擬圖	48
圖4.12平均電流	49
圖4.13 pre-simulation result	49
圖4.14 layout佈局圖	50
圖5.1量測方式示意圖	52
圖5.2 FPGA輸出波形圖	53
圖5.3 FPGA板	53
圖5.4 PCB板	54

表目錄
表3.1連續漸進式控制器輸出結果	38
表4.1模擬結果	51
表4.2效能比較	51
參考文獻
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[8]  Po-Hsiang Fang, “Design and Application of Low Power Pipelined and SAR Analog-to-Digital Converters,” Graduate Institute of Electronics Engineering College of Electrical Engineering & Computer Science National Taiwan University Master Thesis
[9]  Ming-lun Fan, “Successive-Approximation Analog-to-Digital Converter for Low-Power System Applications,” Department of Electrical Engineering National Cheng Kung University Thesis for Master of Science July 2012

[10] Mootaz M. ALLAM, “Systematic Design for a Successive Approximation ADC,” M.Sc– Cairo University – Egypt
[11] Soon-Jyh Chang, “Nyquist-rate ADCs Design,” Department of Electrical Engineering,National Cheng Kung University, Tainan, TAIWAN
[12] Han-Chiang Lin, “Design and Implementation of Energy Efficient Successive-Approximation Analog-to-Digital Converters,” Department of Applied of Electronics Technology National Taiwan Normal University
[13] Rong-Jhou Guo, “Design of a 12-bit, Ultra-low Power Successive Approximation Analog-to-Digital Converter,” A Thesis Submitted to Department of Electrical and Control Engineering College of Electrical Engineering and Computer Science National Chiao-Tung University In Partial Fulfillment of the Requirements for the Degree of Master In Electrical and Control Engineering January 2008 Hsinchu, Taiwan, R.O.C
[14] Dr. S. L. Pinjare, “Introduction to Analog Layout Design,” Workshop on Advanced VLSI Laboratory Cambridge Institute of Technology, Bangalore
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