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系統識別號 U0002-0108201612115700
中文論文名稱 硬體實現T-S小腦模型控制器
英文論文名稱 T-S CMAC Hardware Implementation
校院名稱 淡江大學
系所名稱(中) 電機工程學系碩士班
系所名稱(英) Department of Electrical Engineering
學年度 104
學期 2
出版年 105
研究生中文姓名 林冠儀
研究生英文姓名 KUAN YI LIN
學號 603460014
學位類別 碩士
語文別 英文
口試日期 2016-07-07
論文頁數 42頁
口試委員 指導教授-劉寅春
委員-邱謙松
委員-李世安
中文關鍵字 T-S 小腦模型控制器  硬體實現  整數運算 
英文關鍵字 T-S CMAC  Hardware Implementation  Integer Numeric System 
學科別分類 學科別應用科學電機及電子
中文摘要 科技在人類發展之下,不斷地向前演進,然而在科技快速演進下,智慧型控制器逐漸成為關鍵角色,由於智慧型控制器的運算大多較為複雜,因此運算效能的優劣將決定該控制器的控制效果,過去的設計上大多透過軟體實現控制器,然而由於軟體的單步執行,減低了整體運算的效果,為了提升控制器之效能,本文透過硬體的方式實現小腦模型控制器。
  在硬體實現的同時,將面臨浮點數處理的問題,然而過去的解決方式,是透過IEEE-754的方式來制定浮點數的運算格式,但由於IEEE-754的運算較為複雜,因此將會耗掉較多的運算時間,然而,本文透過整數法的運算處理浮點數的議題。
  在實現T-S小腦模型控制器時,以指數運算最為複雜,由於指數運算時較其他運算複雜,過去設計指數硬體時,較多透過記憶體存取的方式做表格化的建置,然而這樣的設計將占用許多寶貴的存取空間,因此本文透過泰勒展開式之運算,將指數的運算近乎完整的呈現出來,最終本文整合各個運算模組,而實現T-S小腦模型控制器的硬體化設計。
英文摘要 The technology is improving by the human developing. As the technology fast improving, the intelligence control becoming a key point. Because the process of the intelligence control is quite complex, the performance of operating will decide the performance of controller. In the past, the intelligence controller was usually designed by the software system. But the step by step software process will make the performance decreasing. To improve it this thesis use hardware to implement the T-S CAMC.
In hardware implementation we need to face the floating point process problem. In the past, the IEEE-754 is the methodology of solution. But the operating of IEEE-754 is complex. Therefore, the process will take a lot of process time. This thesis use integer numeric system to solve this issue.
While implement the T-S CMAC, the exponential operating is the most complex part in the process. In the past, look up table wad used as the solution. But the method will cost a lot of memory. Therefore, in this thesis the Tylor series was used to solve the exponential problem. Finally, this thesis connect all of the operating modules and realized the T-S CMAC.
論文目次 Contents
Abstract in Chinese I
Abstract in English II
List of Figures V
1 INTRODUCTION 1
1.1 Research Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1.1 Fuzzy Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1.2 Takagi-Sugeno Fuzzy . . . . . . . . . . . . . . . . . . . . . . . . 2
1.1.3 Cerebellar Model Articulation Controller . . . . . . . . . . . . . 2
1.1.4 T-S Fuzzy Model Cerebellar Model Articulation Controller . . . 4
1.1.5 Floating-Point Numeric System . . . . . . . . . . . . . . . . . . 7
1.2 Literature Review . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.3 Problem statement and Motivations . . . . . . . . . . . . . . . . . . . . 8
1.3.1 Problem statement . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.3.2 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2 System Structure 10
2.1 Equipment information . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1.1 FPGA Development main board . . . . . . . . . . . . . . . . . . 10
2.2 Hardware Design TS-CMAC . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2.1 Gaussian function . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.2.2 Multiple and summation . . . . . . . . . . . . . . . . . . . . . . 14
3 Experiment Result 16
3.1 Error Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.2 Gaussian function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.3 Weight Update . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.4 Multiple and summation . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.5 PWM module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
4 Conclusions and Future works 38
Bibliography 39
List of Figures
1.1 CMAC structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 CMAC Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.3 TS-CMAC structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.4 IEEE754 Formate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1 Error Generating Block Diagram. . . . . . . . . . . . . . . . . . . . . . 16
3.2 Error generator Functional wave form. . . . . . . . . . . . . . . . . . . 17
3.3 Error generator Timing wave form. . . . . . . . . . . . . . . . . . . . . 18
3.4 Gaussian Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.5 Power Number Module Block Diagram. . . . . . . . . . . . . . . . . . . 19
3.6 Exponential Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . 20
3.7 Reciprocal Calculating Block Diagram. . . . . . . . . . . . . . . . . . . 20
3.8 Power number in Gaussian Function wave form. . . . . . . . . . . . . . 21
3.9 Power number in Gaussian Timing wave form. . . . . . . . . . . . . . . 22
3.10 Exponential function wave form. . . . . . . . . . . . . . . . . . . . . . . 23
3.11 Exponential Timing wave form. . . . . . . . . . . . . . . . . . . . . . . 24
3.12 Reciprocal of Exponential Functional wave form. . . . . . . . . . . . . . 25
3.13 Reciprocal of Exponential Timing wave form. . . . . . . . . . . . . . . 26
3.14 Gaussian Function wave form. . . . . . . . . . . . . . . . . . . . . . . . 27
3.15 Gaussian Timing wave form. . . . . . . . . . . . . . . . . . . . . . . . . 28
3.16 Update Rule Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . 29
3.17 Weight update wave form. . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.18 Weight update timing wave form. . . . . . . . . . . . . . . . . . . . . . 31
3.19 Multiple and ADD Block Diagram. . . . . . . . . . . . . . . . . . . . . 32
3.20 Multiple and summation functional wave form. . . . . . . . . . . . . . . 33
3.21 Multiple and summation timing wave form. . . . . . . . . . . . . . . . . 34
3.22 PWM Module Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . 35
3.23 PWM functional wave form. . . . . . . . . . . . . . . . . . . . . . . . . 36
3.24 PWM timing wave form. . . . . . . . . . . . . . . . . . . . . . . . . . . 37
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