現今的SoC上，由於電路設計的複雜度與日俱增。所以在測試上相對產生龐大的測試相應資料量，在此資料量中未知向量所佔的比率已經非常的高。用傳統的測試方法過度消耗時間、浪費空間，或者壓縮過後造成失真、不易診斷等問題，本篇論文將提出一個解決方法。
在可測試(DFT)的SoC上，經由ATPG產生測試樣本後，我們會將測試反饋的樣本資料中的未知向量經由遮罩後，再對控制遮罩的控制碼加以壓縮，其中會使用到自動化測試設備(ATE)的重複功能。此方法可以不變動輸出響應，將要作比對的資料壓縮後傳輸在做比對，因為壓縮後資料量變少，可以節省記憶體空間，也可以節省硬體面積。同時也因為沒有改變資料內容，也不會有失真的問題，可以達到完全偵錯。

Reducing test application time and test data volume are major cost factor in SoC design. Currently, scan-based testing is widely adopted on SoC test, a large number of scan cells coupled with a large number of scan patterns have inflated test data volume and test application time. To reduce the test cost, test data compression solutions are used. In general solution, a few number of scan-in channels drive a large number of internal scan chains through decompressor, while the responses collected from the internal scan chains are taken through compactor that drives a few number of scan-out channels. There are many unknown x-bits are generated and collected into compactor after testing, it will be increased the test time and difficulty that the ATE (Automatic Test Equipment) judges. In this paper, we propose a method to fill fixed value into these unknown x-bits of internal scan chains output and then output to compactor. The method is performed prefix aim at the test data of internal scan chains output and then utilize ATE vector repeat function to compress the test data reducing the test data volume that stored in the ATE vector memory.

CHINESE ABSTRACT...............I
ENGLISH ABSTRACT...............II
TABLE OF CONTENTS..............III
LIST OF FIGURES................V
LIST OF TABLES.................VI

CHAPTER 1 INTRODUCTION........................01
1.1 Motivation................................01
1.2 X-filling techniques......................02
1.3 Paper Architecture........................03
	
CHAPTER 2 TEST COMPRESSION OVERVIEW.....................04
2.1 Code-based schemes..................................05
2.1.1 Dictionary Code (Fixed-to-Fixed)..................05
2.1.2 Huffman Code (Fixed-to-Variable)..................07
2.1.3 Run-Length Code (Variable-to-Fixed)...............09
2.1.4 Golomb Code (Variable-to-Variable)................10
2.2 Linear-decompression-based schemes..................12
2.2.1 Combinational Linear Decompressors................14
2.2.2 Fixed-Length Sequential Linear Decompressors......14
2.2.3 Variable-Length Sequential Linear Decompressors....16
2.3 Broadcast-scan-based schemes........................17
2.3.1 Broadcast Scan....................................17
2.3.2 Illinois Scan.....................................19
2.3.3 Multiple-Input Broadcast Scan.....................20

CHAPTER 3 PORPOSED METHODS..............................21
3.1 Basic Idea..........................................21
3.2 Proposed Methods....................................23
3.2.1 Unspecific Bits Fixed Method......................24
3.2.2 Decomposing Prefixing Data........................25
3.2.3 Decompression Hardware............................27
	
CHAPTER 4 EXPERIMENTAL RESULTS..........................29
	
CHAPTER 5 CONCLUSIONS AND FUTURE WORK...................31
	
REFERENCES..............................................32

LIST OF FIGURES
Figure 1.1 Traditional test scheme......................02
Figure 2.1 Architecture for test compression............04
Figure 2.2 Test compression using complete dictionary....06
Figure 2.3 Example of test set divided into 4-bit locks....07
Figure 2.4 Huffman tree for the code shown in Table 2.1....08
Figure 2.5 A test sequence and its encoded test data using Golomb code....11
Figure 2.6 Example of symbolic simulation for linear decompressor....13
Figure 2.7 System of linear equations for the decompressor in Figure 2.6....13
Figure 2.8 Typical sequential linear decompressor......15
Figure 2.9 Three-stage sequential linear decompressor[10]....16
Figure 2.10 Broadcasting to scan chains driving independent circuits....18
Figure 2.11 Broadcast scan for a pipelined circuit......18
Figure 2.12 Two modes of Illinois scan architecture.....20
Figure 3.1 Diagram of proposed scheme for [17]..........22
Figure 3.2 Diagram of proposed scheme...................23
Figure 3.3 Example of proposed unspecific fix scheme....24
Figure 3.4 Example of proposed encoding scheme..........26
Figure 3.5 Example of proposed encoding scheme..........26
Figure 4.1 Example of test benchmark...................29
 
LIST OF TABLES
Table 2.1	Statistical coding based on symbol frequencies for test set in figure 2.3....08
Table 2.2	3-bit run-length code..........................09
Table 2.3	Golomb code with four run-lengths for each group....10
Table 4.1	Results for proposed scheme on test benchmark....30

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